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Part Number: SN74LS125A
Dear Technical Support Team,
I have a question about SN74LS125AN.
I see overshoot on output pin.
How is absolute min of output(Y)?
Is this overshoot inside a permissible range on output(Y) ?
Could you show reference value to withstand undershoot on output(Y)?
I heard that the undershoot inside of 10ns around -1V is less problem on actual system(condition: Not conducting diode).
I guess that attached wave exceed the absolute min, so I'd like to know actual value.
This device is part of the Low-power Schottky (LS) BJT logic family created back in ~1976. Have you considered switching to a more modern family such as SN74HC125? They require much less power, have the same package/pinout, and are much better defined in the datasheets.
For the 'LS125,
Here's the output structure:
If the output is driven below GND, then we would expect the diode from the base to the collector to turn on (forward bias), and current to flow from the base to the output. There won't be much current flowing, however, since that node is essentially isolated by resistors -- in that case, the base of the transistor would be pulled down with the output (since the diode will force the base voltage node to -1.2 + 0.7 = -0.5V).
So, long story short, I wouldn't expect to see much of a problem from the undershoot shown. If it concerns you greatly, you can add a series resistor to the output to limit current, or switch to a more modern device that has a clamp diode at the output.
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