How to test Propagation Delay when only CL is mentioned

Thank you Chris.

Is this this family of gate employs 2 protection diodes for input and output pins or any other protection mechanism.

There are clamp diodes to Vcc and to gnd on both inputs and outputs on this device.

Hi

I am trying to calculate power consumption for the above mentioned IC. When I am trying to measure ICC - Quiescent Current though VDD, I am getting readings close to 950uA. However data sheet mentions it as less than 2uA at 25 Degree Celsius. I am wondering if there are any special considerations to be taken care while performing this test.

I am either giving all input pins GND or VDD and keeping output open.

Icc is measured with all outputs high or all outputs low with no load.  Inputs should be Vcc or gnd as you are doing.

Icc should be 2ma at 25 deg. All inputs should be biased at Vcc or gnd and none should float.

 If any inputs on the part are floating you will see higher Icc.

Thank you for confirming. Do you mean 2uA at 25 deg and not 2mA.(2uA as per datasheet)

Thank you

Yes I meant 2ua .

sorry about that

Hi Chris,

Thank you for your inputs. I was able to test it and it worked fine!!

On the other note, datasheet has + and - values (+0.1ua and -0.1ua) for Input Leakage Current(Ii). I wanted to understand why these values are not called out separately. i.e. IIH and IIL ?

I am assuming that + sign corresponds to leakage current for HIGH input and -ve sign for leakage current for LOW input.

OR is there any circumstance where for HIGH input value the DUT input pin would source current - Seems incorrect to me. So wgat made manufactures combine IIH and IIL into one parameter i.e. Ii

I believe being CMOS device should not be the reason to do so.

Thank you

Hi Mandar

 I have attached this app note that explains all test in the datasheet. This may help you in you testing.