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Cmos output current flow back

Other Parts Discussed in Thread: SN74LVC574A

Hello,


For an application, I want to use a SN74LVC574A component. This component will be connected with another one which have differents threshold.

Before to use level shifter or some discret component in interface, I would like to konw why connections like below doesn't work?

The idea is that when the LVC is driving a high level, the Pmos is closed and so voltage at the input of the other IC is 6.65V (between both resistors).

So, it will be a current flow back to the LVC but is this current will damage the Pmos at the output of the LVC?

It is the case, why? is it because output stage is not like a real Pmos?

Thanks

Regards