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SN74AHC245: Termination for Temporarily Tri-Stated Inputs

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Part Number: SN74AHC245

Hi Team,


On my customer's system, the SN74AHC245 direction (DIR) pin is controlled by a R/nW signal (logic 1 selects A->B) and side A of the transceiver is connected to a bus, which connects to circuit boards and components that are tri-stated for long periods of time (minutes). Would the A-side bus require passive termination? I assume it does, similar to floating inputs, but would like to confirm.

Thanks,

Antonio

  • Hi Antonio,
    Yes, since all I/O pins of the device have CMOS inputs, there should always be a valid logic level at every I/O pin. Very weak pull-downs can do this job (100kohm) in the majority of systems.


    Looking for a low voltage translator? Check out the AXC family that supports 0.7V to 3.3V translation!

    The Logic Minute training page has videos on many interesting topics that all are kept shorter than 5 minutes.

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