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SN74LVC8T245-EP: TTL Logic

Part Number: SN74LVC8T245-EP

I have an application for this part where I am taking in TTL logic and transititioning it to FPGA logic levels. TTL is 5V logic and is defined as having the following parameters:

High Output = 2.7V - 5V

Low Output = 0V - 0.5V

High Input = 2V - 5V

Low Input = 0V - 0.8V

This devices can run off of different supply voltages, and depending on the supply voltage it considers different voltage inputs to be high. Looking at the datasheet reveals that when you power the device with 3.3V it has the same lower thresholds as the inputs defined above, but does not list the maximum inputs. When you power it with 5V there is not guarentee that my TTL signals will come across accurately. The absolute maximum table says that it can withstand an input voltage of 6V.

Given this: can I power my device with 3.3V and put 5V logic on the input pins and expect the chip to operate correctly?

I assume this is the case, because why wouldn't this chip be able to handle TTL. But I want my system to work right the first time. 

~Austin

 

  • Austin,
    This device has 2 supplies to handle the voltage translation to/from different rails.
    VCCA for the A bus and VCCB for the B bus.

    What is the FPGA logic level? 3.3, 2.5, 1.8, 1.5, 1.2V?

    Do you require a -EP device? If not, there may be translation devices available to choose from.

    The absolute max table indicates that the voltage input Vi can be anywhere from -0.5V to 6.5v independent of the VCCx setting. This allows you to "overdrive" the input above the VIH level without stressing or damaging the device.

    This app note may help some, even though it is a little older:
    www.ti.com/.../getliterature.tsp

    If you are going from 5V ttl to 3.3V cmos, you do not need a dual rail translator. You can simply use 3.3V device, as long as that device can withstand a 5V input. The absolute max Vi must be higher than maximum voltage seen at the input. Though you did not describe if your system needs to be a transceiver, or if data is only one direction. So, this is a factor in your search on selecting appropriate device.

    Regards,
    Wade
  • Thanks for the reply Wade,

    The inputs on my FPGA are 3.3V and cannot go up to 5V. 

    I have 5V TTL logic coming in that I want to translate down to 3.3V, such that my FPGA can read them. I do not need to toggle the direction on any of these level shifters I am using. Currently I have the device powered with 3.3V on both sides, and wanted to make sure it would operate as expected. As I mentioned before, when supplying the A side with 5V what is considered high is not in accordance with TTL Logic levels, but supplying it with 3.3V is, but that is then putting 5V logic on a device supplied by 3.3Vs. I know that it is within the absolute maximum ratings on the device, but those ratings do not guarentee correct system operation.

    I don't remember what the EP stood for on these devices. If it is extended temperatue I need that. 

    ~Austin

  • Austin,
    I apologize for delay.
    For this device, the VIH/VIL levels will be satisfied and still within the recommended operating conditions.
    For example your VOH from the TTL device will range from 2.7 to 5V. The VIH for the 8T245 at 3.3V is min of 2V, with no max listed. Thus, it can operate up to the absolute max vi condition. The VIL condition is well within range as well.

    Using it this way will not be an issue.

    "EP" in this context represents an Enhanced Product. These products have at a minimum controlled baselines, and most have some sort of temperature extension.
    More information can be seen here: www.ti.com/.../technical-documents.html
    Specifically this document explains more: http://www.ti.com/lit/SGZT005

    If this answers your question, please click "Verify it as the answer"
    Regards,
    Wade