• State TI Thinks Resolved
  • Locked Locked
  • Replies 2 replies
  • Answers 1 answer
  • Subscribers 18 subscribers
  • Views 188 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN74LVC1G11:

Jim Lumpkin
Prodigy 30 points
Part Number: SN74LVC1G11

Hi, I am using the SN74LVC1G 3 input AND gate and seeing something that concerns me. The three inputs monitor Vcc (3.3), Reset chip and FPGA read signal. Output goes to processor Reset. When I touch any one of the inputs with a scope probe (1 MEG), I immediately get a processor reset (AND output glitches low). I noticed the AND supply (3.3) is not decoupled (no cap at supply pin). Should I expect this? Thank you, Jim

 
  • 0
    TI__Guru* 96591 points
    Hi Jim - and welcome to the forums!
    Can you provide the schematic for the input circuits connected to the AND gate? Scope shots are also helpful, but I understand that it might be difficult to capture the event you're describing.
  • 0 in reply to Emrys Maier
    TI__Guru* 96591 points
    Hi Jim,
    I haven't heard back from you in a while. I'm going to go ahead and close out this thread for now. if you can provide the information I requested, please respond here -- or if the thread is already locked, just use the "+ Ask a related question" button in the top right of the forum site.