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SN74LVC2G17: VIH spec.

Part Number: SN74LVC2G17
Other Parts Discussed in Thread: SN74LV1T34, SN74LV4T125

Hi Sir,

I'm designing the SN74LVC2G17 with input 3.3V to output 5V when VCC is 5V.

And have 2 questions:

1. I didn't see the VIH/VIL spec from datasheet for VCC=5V, which only show as below.

    Could you please help to clarify  it?

2. Search from other e2e forum. (https://e2e.ti.com/support/logic/f/151/p/125831/450515?tisearch=e2e-sitesearch&keymatch=SN74LVC2G17%252520VIH#450515) it mentioned SN74LVC2G17 will not work for voltage translate from 3.3V to 5V but LVC2G34 is the right solution.

But I just found the if we design VCC=5V, the VIH min is 0.7*VCC=3.5V, and my input voltage is 3.3V, is it the right deisgn?

Please help to advice.

3. And I just found maybe SN74LV1T34 is the right solution for Vin=3.3V translate to Vout=5V, correct?

  • Hi Anne,

    When a value is not listed, it can be interpolated with the values given.

    So for VCC = 5V for the SN74LVC2G17, for VIH we get positive going threshold max of between 3.1V and 3.7V which is 3.4V. This is very border line condition for your 3.3V input and I would not recommend you use this buffer for up translation.

    The post you are referring to that mentions the LVC2G34, the customer is down translating from 5V to 3.3V so thats why it works for them.

    For a single supply solution, you can use single bit SN74LV1T34 or for 4 bits there is the SN74LV4T125. I couldn't find any dual channel device. These devices support 3.3V to 5V up translation.

    Thanks!

    -Karan