Hi team,
My customer is using a 60MHz output crystal for a FPGA. To increase the crystal output driver capability, they wants to add a sn74LVC1G32 between the 60Mhz crystal and FPGA as below picture. So is there any potential issue with this design? And could you please help explain how to evaluate if the SN74LVC1G32 can pass a 60Mhz square wave? Which parameter is the most important one? Is there a parameter like bandwidth of the sn74LVC1G32 can be used to evaluate? Thanks.
Best regards,
Wayne