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SN74LVC125A: output voltage leakage

shujie xu
Prodigy 70 points
Part Number: SN74LVC125A
Other Parts Discussed in Thread: SN74LVC07A, SN74AUC125, SN74LVC2G125

Now we found a voltage leak problem on the SN74LVC125A buffer,  and the voltage will leak from the output to the Vcc, voltage delta is about 0.5V, and it will happen on no matter the output enable or disable.

We found that this problem has nothing to do with our peripheral circuits, only this buffer. Pls help check this.

  • 0
    Guru 243180 points

    The absolute maximum ratings do not allow any output voltage (VO) higher than VCC + 0.5 V.

    Why are there voltages higher than VCC? Consider using an open-drain buffer like the SN74LVC07A.

  • 0 in reply to Clemens Ladisch
    Prodigy 70 points

    Why are there voltages higher than VCC?

    Answer: The usage scenarios for current project is as follow :

    1, pull high OE to disable the buffer
    2, since the output(1Y,2Y,3Y,4Y) is still connect to other chip UART interface and still active, there are still with 1.8V on these lines.
    3, Turn off the vcc voltage, and found the VCC is going down to about 1V, the VCC can't reach 0V due the voltage leakage.

    Please help to confirm if this component will have the problem of voltage leakage in this scenario? 

    What will happens when vout(1Y,2Y,3Y,4Y) is greater than vcc and why this happen?

    thanks. 

  • 0 in reply to shujie xu
    Guru 243180 points

    When the output voltage is higher than VCC, a current will flow through the ESD protection diode from the output to VCC.

    There are devices with the "partial-power-down (Ioff)" feature, which allows voltages at the outputs when the device is powered down. In the LVC family, only little logic devices have it; other families have it in all devices. Consider using 2× SN74LVC2G125, or SN74AUC125.