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SN74LV245A: Ouput high impedance with /OE pin

Part Number: SN74LV245A

Hi team,

Could you give me comment on following customer questions?

Q1. For the datasheet 11, it describes "to ensure the high-impedance state during power up and power down, /OE should be tied to Vcc through a pullup resister". When /OE pin is pulled up to VCC, it looks the device is permanently disabled. Is it correct understanding? 

Q2. When /OE pin is pulled down to GND, it looks the customer doesn't have the output high-impedance of the device. In order to ensure the device is under high impedance, /OE pin should be high during power-up and -down by such as external MCU that has powered up?

Best regards,
Takeshi Sasaki

  • If you do not care about the state of the I/Os during power up and power down, you can connect OE directly to GND.

    1. The pull-up resistor allows a microcontroller to pull the OE pin low after power up.

    2. The pull-up resistor is needed to get a high voltage before the MCU has initialized its GPIOs.