LSF0108: Schematic Review
Part Number: LSF0108
I would like to translate signals between our DUT to a CPU. The signals are I2C and GPIO. I believe I have all the issues sorted out. Could you please review the following drawing?
Does this look like the correct way to implement the translator?
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In reply to Bill Kury:
Hi Bill, and welcome to the forums!
From the above information, it looks like you've watched my video series - hopefully it was helpful in your design.
I don't see your bias circuit in the above schematic, but I assume you have 3.3V connected to a 200kohm resistor and that tied to Vref_B and EN. On the other side you have the 1V supply connected directly to Vref_A.
Your Mbps calculation is slightly off (by my calculation) -- 1/(6*550*50e-12) = 6.06 Mbps, so max clock speed would be 3.03 MHz with that load/pull-up combination. Note that the value is a very safe estimation, so you can probably push that to 5 or 6 MHz in practice.
I don't think that will be a problem though - most of the time I2C operates at 400 kbps (for 'fast' mode). If that's the case, you could increase your resistors to:
R_pu = 1/(6*400000*50e-12) = 8.3 kohm
Most I2C systems use 4.7kohm resistors in my experience -- you could instead just use that and adjust if you run into problems.
The same is true for the GPIO signals -- if you don't need the high speed, you can increase the resistor values, which will improve V_OL and reduce power consumption.
My recommendation would be to try operating with 4.7kohm on both sides for the I2C signals, and 1kohm on the 'B' side of the device for the GPIO signals.
In reply to Emrys Maier:
Yes I did watch your video and they were well done. I know about the bias circuit and was going to implement it. I just didn't draw it using Visio because the resistors are a pain. Thanks for clarification on the speed. Since I am only running i2c and GPIOs I just wanted to make sure I had enough headroom.
I will use your suggestions for the pullups.
Thank you for your videos and answering my questions.
Always happy to help.
If you can use it - I have a Visio file that I use for piecing together circuits (built in Visio 2010). I find it helpful for getting a drawing thrown together quickly.
I was able to download the file and get the circuit components. Thanks, it saves me some work.
I have a question regarding propagation delay from 3v3 to 1v0. In my application above, our design group would like to know how fast a signal will propagate. My answer, according to the datasheet was it should be 1 to 2 ns. Since no there is no RC required to translate down, it should be quick. Is this a reasonable assumption?
Yes, the output will very closely track the input when doing down translation.
Measuring delay can get confusing when the input signal is three times the voltage of the output, since we're measuring from 50% at the input signal (1.65V) to 50% of the output signal (0.5V). This is further complicated by the way the LSF works.
It would probably be more accurate to measure from 0.5V at the input to 0.5V at the output. Since we don't do that, the slew rate of the input signal can have a large effect on the final delay value measured. For example, if the device took 30ns to transition from 1.65V to 0.5V on the input, then the delay would be measured as ~31ns.
Thanks for the quick reply.
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