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SN74LV14A: Vo Abs max definition

Takashi Onawa
Genius 13200 points
Part Number: SN74LV14A

Hi Team,

There are two definition of Vo abs max level in the datasheet as below.

It looks like we have to be careful about the relationship between the Vcc and Vout voltages when the Output is NOT Hi-Z, but what are the conditions under which Vout is Hi-Z?

Also, Can we regard as Vcc=0.3V condition is Power Off state?

Regards,

Takashi Onawa

  • 0
    Guru 243190 points

    The outputs of this simple inverter do not have a high-impedance state. (There is no OE input.)

    Anything below 0.5 V should work as power off. But where do those 0.3 V come from?

  • 0 in reply to Clemens Ladisch
    TI__Genius 13200 points

    Hi Clemens-san,

    Thanks for your prompt response on this.

    There is low pass filter on my customer's circuit and Vout becomes  Vout > Vcc+0.5 condition at the falling edge of the power supply(around 0.3V).

    They would like to know whether that is abs max violation or not.

    Regards,

    Takashi Onawa

  • 0 in reply to Takashi Onawa
    TI__Guru* 96591 points

    Hello Onawa-san,

    It sounds like there are two issues here

    (1) The supply is not going to 0V when the device is turned off.

    (2) The output is discharging slower than the supply, resulting in Vout > Vcc + 0.5V

    For (1), we can only guarantee what is in the datasheet, and it states that Ioff is only applicable if Vcc = 0V. That being said, 0.3V should be sufficient to turn of the device and enable the Ioff circuitry to prevent back-flow current into any outputs.

    For (2), as long as current is limited in this case (25mA) then the device will not be damaged. Since you said there is a low pass filter at the output, the current is probably limited sufficiently and no damage will be incurred.

  • 0 in reply to Emrys Maier
    TI__Genius 13200 points

    Hi Maier-san,

    Thanks for your comments.

    Let me correct your understanding of (1) . In their circuit, Vcc goes to zero, Output doesn't go to zero due to charged voltage on cap in LPF.
    I will send the waveform to you off line later.

    Would this be an absolute maximum ratings violation? What is the definition of power-off state?
    If yes, please tell me how they can avoid the violated condition during turning off.

    Regards,

    Takashi Onawa

  • 0 in reply to Takashi Onawa
    TI__Guru* 96591 points

    Hello Onawa-san,

    No, this is not a violation. The specification Ioff is defined for this circumstance (between 0 and 5.5V on the output with Vcc = 0V):