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TM4C123FH6PM: EEPROM usage and max write help

Part Number: TM4C123FH6PM

Hello, 

I need some clarification on the EEprom for the TM4C123x.  The datasheet is confusing to me because it uses terminology that is not defined clearly. Our application uses different blocks for different data.  Block 0 contains some boot info data written at the factory that is usually only written once. It does not fill up the entire 64 Bytes of the block so we are not writing each word, only the words we have used.

Block 1, 2, 3 and 4 contains some data that is changed very frequently.  This information can be written too many times over the life of the product. With this information, what will the endurance of the EEprom be? The way I read the data sheet it looks like each word in the EEprom can be written a minimum of 500k times, and a maximum of 15 million times depending on the method used.  Can someone clearly explain how 15 million writes can be achieved?  Also, can someone verify that the minimum is indeed 500k writes no matter how we write to each cell?  And finally, can someone let me know how to implement a 15M write (i.e. some application note or sample code)?

Tks in advance for your support

BR

Carlo

  • Hi,

      My colleague has an unpublished app note about the EEprom theory of operation. In it, it has the below clarification on how the endurance cycles is calculated. Hope this helps. This app note is still work in progress and there is plan to publish in the future. 

    2 Theory of Operation
    2.1 Normal Use
    The EEPROM of the TM4C123x device is composed of a bank of split gate flash. The flash cells have an intrinsic write-erase endurance of more than 100,000 cycles. The bank is implemented with 17 sectors. Sixteen sectors are used for data and the seventeenth is used for the copy buffers. A sector is the smallest amount that can be erased at one time. Each of the sixteen data sectors is broken into two blocks. Each block holds 16 32-bit words (64 bytes). Within that block there are actually storage locations for seven images of the 16 words, with additional flash control bits to identify which of the seven images holds the valid data.
    In normal operation, the EEPROM hardware state-machine keeps track of which of the seven images of a word are valid. When the program tries to update a word the eighth time, the word is initially written into the copy sector. Then the current value of each of the other 31 words ((16 words x 2 blocks) – 1) is also copied to the copy sector. The data sector is then erased, and the data in the copy sector is programmed into the first image of the data sector.
    The copy sector, like the data sectors, has multiple images. There are 12 image locations in the copy sector. That means that before the thirteenth time a data sector must be erased, the copy sector must be erased to prepare more room. The hardware state-machine will initiate an erase of the copy sector the next time a data sector requires an erase. This results in a longer delay before the data can be stored in non-volatile memory.


    2.2 Normal Endurance
    Since each flash cell is capable of over 100,000 write-erase cycles, and there are seven image copies available for each word in a block, the expectation is that the word is capable of over 700,000 write-erase cycles. That is true, but other words in the sector have an impact on the total number of write-erase cycles that any flash cell sees. A write-erase cycle will occur on a flash cell each time it is changed from a zero to a one. That is, each time electrons are pulled off of the floating gate through the erase oxide. Take an extreme example of two words programmed into a data block. The first word is updated 700,000 times, the second word is not updated at all. Assume the least significant bit of both words is always 0. Because of the 700,000 writes, the sector containing that block will be erased 100,000 times. As expected, the word that was changed 700,000 times will have seen 100,000 write-erase cycles on the least significant bit in all seven images. Those bits will be nearing end of life. Perhaps unexpectedly, the least significant bit of the second word, which was never updated, will also have seen 100,000 write-erase cycle in just the first image. That bit too will be nearing end of life.


    In typical applications, different words are updated at varying frequencies. Since the word most often updated, may not be the one updated the most often within a stretch of seven updates, a conservative limit of 500,000 cycles is specified for the most often updated word in the sector.
    When large amounts of data are written in a single sweep, the full 600,000 write-erase cycle advantage of the wear leveling can be achieved. Adding software wear leveling, even greater number of write-erase cycles are possible.


    Note: When doing sweep programming you get an effective 600,000 write-erase cycles instead of 700,000 write erase cycles. As soon as you write the first word of the sweep the eighth time, the sector is erased and the eighth value of the first word is programmed into the freshly erased location, along with the seventh version of all the other words in the sweep. Then when you update the second word of the sweep, it occupies the second image of that location. You only have five image locations left for the second location. When you write the first word of the sweep the fourteenth time, it resides in the seventh image. But when you write the fourteenth version of the second word, it initiates a sector copy. If you always program the words of the sweep in the same order, successive words will initiate the sector copy. You will have an effective six versions of the sweep data stored between each sector copy operation.