Other Parts Discussed in Thread: EK-TM4C123GXL
Hey,
I am new to the TM4C123GH6PGE series. Currently I try to understand how I can do FiFo tx transfers that are controlled by interrupts.
Design:
I like to create a send function that fills the FIFO and waits till its done. Since I am using a RTOS(Zephyr) I like to do some other stuff while the FIFO transfer is going on. So the transfer should be controlled via TX/FIFO interrupt.
I like to know how I need to setup the FIFO/INTR
I attach some "pseudo code". This code is compiled from my Zephyr UART API implementation, a middle layer that handles uart async and some app functions.
The "setup" and "send" functions are the entry points.
static char * pB; static int N; static int uart_tiva_fifo_fill(const struct device *dev, const uint8_t *buf, int len) { const struct uart_tiva_config * const cfg = DEV_CFG(dev); const uint32_t base = cfg->base; int n = 0; while (n < len) { if (false == UARTCharPutNonBlocking(base, buf[n])) { break; } n++; } return n; } static void uart_tiva_isr(const struct device *dev) { const struct uart_tiva_config * const cfg = DEV_CFG(dev); struct uart_tiva_runtime *const dev_data = DEV_DATA(dev); const uint32_t base = cfg->base; const uint32_t UIstatus = UARTIntStatus(base, true); if (dev_data->cb) { dev_data->cb(dev, dev_data->cb_data); } UARTIntClear(base, UIstatus); } static void uart0_fifo_callback(const struct device *dev, void *user_data) { ARG_UNUSED(user_data); if (uart_irq_tx_ready(dev) && (N)) { const uint32_t am = uart_fifo_fill(dev, pB, N); N -= am; pB += am; if (0 == N) { uart_irq_tx_disable(dev); k_sem_give(txDone); } } } void send(char * txt, int len) { pB = txt; N = len; const int n = uart_tiva_fifo_fill(uart0, pB, N); N -= n; pB += n; if (am) { k_sem_take(txDone, K_FOREVER); } } static int uart_tiva_configure(const struct device *dev, const struct uart_config *cfg) { const struct uart_tiva_config * const devCfg = DEV_CFG(dev); const uint32_t base = devCfg->base; uint32_t tiCfg = 0; switch(cfg->parity) { case UART_CFG_PARITY_NONE: tiCfg = UART_CONFIG_PAR_NONE; break; case UART_CFG_PARITY_ODD: tiCfg = UART_CONFIG_PAR_ODD; break; case UART_CFG_PARITY_EVEN: tiCfg = UART_CONFIG_PAR_EVEN; break; case UART_CFG_PARITY_MARK: case UART_CFG_PARITY_SPACE: default: return -ENOTSUP; break; }; switch(cfg->stop_bits) { case UART_CFG_STOP_BITS_1: tiCfg |= UART_CONFIG_STOP_ONE; break; case UART_CFG_STOP_BITS_2: tiCfg |= UART_CONFIG_STOP_TWO; break; case UART_CFG_STOP_BITS_0_5: case UART_CFG_STOP_BITS_1_5: default: return -ENOTSUP; break; }; UART9BitDisable(base); switch(cfg->data_bits) { case UART_CFG_DATA_BITS_5: tiCfg |= UART_CONFIG_WLEN_5; break; case UART_CFG_DATA_BITS_6: tiCfg |= UART_CONFIG_WLEN_6; break; case UART_CFG_DATA_BITS_7: tiCfg |= UART_CONFIG_WLEN_7; break; case UART_CFG_DATA_BITS_8: tiCfg |= UART_CONFIG_WLEN_8; break; case UART_CFG_DATA_BITS_9: // ToDo: check how 9bit mode is right fully setup // tiCfg |= UART_CONFIG_WLEN_8; // UART9BitEnable(base); // break; default: return -ENOTSUP; break; }; UARTEnable(base); UARTConfigSetExpClk(base, SysCtlClockGet(), cfg->baudrate, tiCfg); /* Clear all UART interrupts */ UARTIntClear(base, UART_INT_OE | UART_INT_BE | UART_INT_PE | UART_INT_FE | UART_INT_RT | UART_INT_TX | UART_INT_RX | UART_INT_CTS); switch(cfg->flow_ctrl) { case UART_CFG_FLOW_CTRL_NONE: UARTFlowControlSet(base,UART_FLOWCONTROL_NONE); break; case UART_CFG_FLOW_CTRL_RTS_CTS: UARTFlowControlSet(base, UART_FLOWCONTROL_RX | UART_FLOWCONTROL_TX); break; case UART_CFG_FLOW_CTRL_DTR_DSR: default: return -ENOTSUP; }; UARTEnable(base); return 0; } void setup(void) { const struct uart_tiva_config * const cfg = DEV_CFG(dev); const uint32_t base = cfg->base; pinmux_tiva_arrayCfg(cfg->pinctrl_list, cfg->pinctrl_list_size); // switch uart on sysctl_activatePeripheral(base); IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), uart_tiva_isr, DEVICE_DT_INST_GET(n), 0); UARTIntClear(base, UART_INT_RX | UART_INT_RT); irq_enable(DT_INST_IRQN(n)); UARTTxIntModeSet(base, UART_TXINT_MODE_EOT); const struct uart_config uart_cfg = { .baudrate = cfg->baudrate, .parity = UART_CFG_PARITY_NONE, .stop_bits = UART_CFG_STOP_BITS_1, .data_bits = UART_CFG_DATA_BITS_8, .flow_ctrl = UART_CFG_FLOW_CTRL_NONE }; uart_tiva_configure(dev, &uart_cfg); }