I2C glitch filter function could be available on TM4C1290NCPDT.
Datasheet describes the way of turning on glitch suppression by setting internal clock width with register I2CMTPR[18:16] .
The following is my understanding when this function goes.
1) Glitch detection is started on every edge (SCL , SDA).
2) MCU distinguishes the glitch whether logic level (SCL, SDA) remains stable for the width of I2CMTPR[18:16].
3) MCU ignores this edge if it does not meet the requirement of the width to allow to pass.
My understanding is correct ?
Regards,
Hideyuki
