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RM44L520: ADC: group priorities and freeze (FRZ_EV)

Part Number: RM44L520

Hi,

From TRM (SPNU608A–March 2018) it is a bit difficult to interpret the detailed action properly in case there are multiple groups triggered "simultaneously".

It is clear that by default group in conversion is not kicked out (20.4.6):
"If the new conversion request comes from a separate group, then the ongoing channel’s conversion will be completed before starting the new sequence of conversions."


It is also clear that in case multiple groups has pending trigger the priority order listed in 20.4.4 applies.

In 20.4.4 is mentioned also freeze but description of it quite doesn't match to what registers has - this talks about freezing higher priority groups.
"The conversion group freeze capability allows the application to override this default priority between the conversion groups. Enabling the freeze capability allows the ADC to freeze a higher-priority conversion group’s conversions whenever there is a request for conversion in another (lower-priority) group."

If looking for example ADG1MODECR (bit FRZ_G1) it says that also higher prio event group is capable of kicking G1 out opposed to TRM 20.4.4 which claims that only higher prios can be kicked out:
"This bit allows a Group1 conversion sequence to be frozen if an Event Group or a Group2 conversion is requested. The Group1 conversion is kept frozen while the Event Group or Group2 conversion is active, and continues from where it was frozen once the Event Group or Group2 conversions are completed."

We have the following needs:
- 1 group (say eventgroup) shall be always converted at fixed interval (say 25us) so conversion must always happen in 25us period
- 1 group (say group1) shall be converted when ever timings not matter, just to have fresh result when requested (this is AD based temperature).

Based on 20.4.4 text I cannot use RTI_COMP on event group ja continuous conversion on G1 since most likely G1 is on conversion when when RTI_COMP hits. But based on MODECR description I could do that if setting FRZ-bit and G1 would be kicked out when ever there is a time to convert event group...

Bullet proof option most likely would be (regardless of TRM interpretation) to hook RTI_COMP to both groups and manually ensure that conversion time of both groups is less than RTI_COMP period, since in this case groups would always get trigger simultaneously and internal priority shall guarantee that conversion order stays always the same thus ensuring fixed 25us sample time for event group.

Question1: which one is correct, text in 20.4.4 or text in MODECR register(s)?
Question2: would FRZ-bit in G1 provide guaranteed/fixed/unaltered execution of event group per RTI_COMP signalling despite how G1 is triggered (is it single time manual on continous conversion)

Asking this because testing of actual behavior is quite "challenging", FRZ-bit would be elegant solution, using RTI_COMP in both groups seems a bit kludge but still bulletproof.

  • Hi Jarkko,

    The description in both locations are correct. But description in MODECR register is more clear. 

    The freeze-enable bit for each conversion group allows conversions to be prioritized according to the following rules:

    • When the freeze-enable bit for a group is set, the priority of that group is lowered, which freezes a conversion after completion of the ongoing channel if another higher priority group requests conversion.
    • When all conversions for the new higher-priority group are complete, the frozen group is again enabled, and the conversion resumes from the point where it was frozen.

    For an example:

    Group 1 is programmed to convert channels 1 through 4 in continuous (repeating) mode, and is freeze enabled, which means it has a lower conversion priority than either group 2 or the event group.

    During the conversion of channel 3, group 2 is programmed to convert channels 5, 8, and 10 in single-conversion (one-pass) mode, and is also freeze enabled. Because the freeze bit of group 1 is also set, group 2 implicitly has higher priority than group 1. However, the priority of group 2 is lower than the priority of the event group. As soon as the channel select register of group 2 is written, the next conversion slot is given to group 2 (channel 5), and group 1 is frozen (between channels 3 and 4).

    The event group conversion request occurs sometime during the conversion of channel 8 (from group 2). Immediately following the conversion of channel 8, conversion of channel 9 from the event group starts.

    When conversion of all channels of the event group is complete (9, 14, and 15), group 2 is unfrozen, and the conversion of the last channel of group 2 is completed.

    Now, group 1 goes back to continuous conversion of channels 1 through 4 and resumes where it left off with channel 4. This conversion continues until a second event group occurs where channels 9, 14, and 15 are once again converted.

    Sometime during the conversion of the higher priority event group (channels 9, 14, or 15) user software writes to the ADG2SEL register requesting that channels 6, 7, 11, and 12 be converted. Because group 2 has priority over group 1 but not over the event group, conversion of channel 6 does not start until the conversion of channel 15 is finished.

    When all of the new group 2 channels have been converted, the conversion of group 1 resumes.

    Group 1 is terminated when ADG1SEL is cleared (no channels selected) by writing 0x0000 to it.

  • Hi Jarkko,

    The description in both locations are correct. But description in MODECR register is more clear. 

    The freeze-enable bit for each conversion group allows conversions to be prioritized according to the following rules:

    • When the freeze-enable bit for a group is set, the priority of that group is lowered, which freezes a conversion after completion of the ongoing channel if another higher priority group requests conversion.
    • When all conversions for the new higher-priority group are complete, the frozen group is again enabled, and the conversion resumes from the point where it was frozen.

    For an example:

    Group 1 is programmed to convert channels 1 through 4 in continuous (repeating) mode, and is freeze enabled, which means it has a lower conversion priority than either group 2 or the event group.

    During the conversion of channel 3, group 2 is programmed to convert channels 5, 8, and 10 in single-conversion (one-pass) mode, and is also freeze enabled. Because the freeze bit of group 1 is also set, group 2 implicitly has higher priority than group 1. However, the priority of group 2 is lower than the priority of the event group. As soon as the channel select register of group 2 is written, the next conversion slot is given to group 2 (channel 5), and group 1 is frozen (between channels 3 and 4).

    The event group conversion request occurs sometime during the conversion of channel 8 (from group 2). Immediately following the conversion of channel 8, conversion of channel 9 from the event group starts.

    When conversion of all channels of the event group is complete (9, 14, and 15), group 2 is unfrozen, and the conversion of the last channel of group 2 is completed.

    Now, group 1 goes back to continuous conversion of channels 1 through 4 and resumes where it left off with channel 4. This conversion continues until a second event group occurs where channels 9, 14, and 15 are once again converted.

    Sometime during the conversion of the higher priority event group (channels 9, 14, or 15) user software writes to the ADG2SEL register requesting that channels 6, 7, 11, and 12 be converted. Because group 2 has priority over group 1 but not over the event group, conversion of channel 6 does not start until the conversion of channel 15 is finished.

    When all of the new group 2 channels have been converted, the conversion of group 1 resumes.

    Group 1 is terminated when ADG1SEL is cleared (no channels selected) by writing 0x0000 to it.

  • Hi,

    Ok, so the end conclusion is that there is no built-in method to kick out group immediately to make room/guarantee the exact timing of the some other group. In your post looks that ongoing channel is always converted to the end and that causes the jitter for more higher priority channel which depends on the timing setting of that lower priority group that how long the conversion of one channel inside group takes and at which time during the on-ongoing channel conversion the higher priority group is triggered.

    To guarantee the execution order and timing I'll have to setup the RTI_COMP (or similar) trigger to the all used groups for that ADC device and this way (no freezes are needed) the timing of the most important group is always guaranteed since groups triggers simultaneously.

  • Yes, the ongoing channel’s (frozen enabled group) conversion will be completed before switching to another group. Using RTI_COMP is nice way to trigger the group with higher priority on time.