Due to the U.S. Thanksgiving holiday, please expect delayed responses during the week of 11/22.

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM2432: Pin mapping problem - SysConfig v1.9

Part Number: AM2432
Other Parts Discussed in Thread: SYSCONFIG

Hello TI team,

I was configuring SysConfig v1.9 for my new AM2432 ALX based design, and I found out a mismatch between what I find in the datasheet (SPRSP65B) and what Sysconfig shows me.

In detail, in the datasheet I see pin G5 as VDDR_CORE and pin F5 as  PRG0_PRU1_GPO6, but SysConfig shows me the opposite, as highlighted in the image below:

Can you please clarify this point in order for me to correctly map the two pins in my design? 

Thank you.


  • Hello Flavio,

    The device datasheet is correct.

    G5 = VDDR_CORE

    F5 = PRG0_PRU1_GPO6

    This is a bug in the AM243x_ALX deviceData for the SysConfig tool. However, it will still correctly set the PADCONFIG_114 control register when configuring the PRG0_PRU1_GPO6 signal. We will work to resolve this issue in the deviceData file so it is correctly represented in the tool.


    Zackary Fleenor

  • Thank you Fleenor for the clarification. My design was aligned to the datasheet info, so your reply confirms it is correct.

    Thank you