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RM57L843: RM57L843: EMIF interfacing 4xMRAM chips

Part Number: RM57L843

Hello all.

I don't have any questions, just want to share working solution to topic I've created some time ago

to interface asynchronous MRAM memory chips you have to connect them like this.

schematic I've created here-> RM57L843: EMIF interfacing four MRAM chips - Arm-based microcontrollers forum - Arm-based microcontrollers - TI E2E support forums is a bit faulty, it is adressing every second word.

I hope it will be usefull to someone looking for any solution how to properly interface asynchronous memory to RM57.

regards.

  • it is adressing every second word.

    What is the problem in your schematics below?

  • Hi QJ.
    We (me and firmware engineer) run two tests as described below.
    1. Test software reads 16-bit words from addresses:

    0x60000002 = 0xFFFF
    0x60000004 = 0xFFFF
    0x60000006 = 0xFFFF
    0x60000008 = 0xFFFF
    0x6000000A = 0xFFFF
    0x6000000C = 0xFFFF
    0x6000000E = 0xFFFF
    0x60000010 = 0xFFFF
    

    results on logic analyzer

    so on BA0 is no activity whatsoever.

    2. test software reads subsequent words from addresses

    0x60000002 = 0xBEF2
    0x60000004 = 0xBEEF
    0x60000006 = 0xBEF2
    0x60000008 = 0xBEF5
    0x6000000A = 0xBEF6
    0x6000000C = 0xBEF5
    0x6000000E = 0xBEF6
    0x60000010 = 0xBEF9
    0x60000012 = 0xBEFA
    0x60000014 = 0xBEF9
    0x60000016 = 0xBEFA```
    

    when results should be 0xBEEF + i, when i is subsequent 16-bit word.

    and real results are that every other word is copy of the word two steps back

    Issue is with actual schematic:

    and that is wrong, should be as below



    Wojciech

  • Thanks for clarification, The error is not shown in the diagram of your first post. 

    You are correct: EMIF_ADDR[0] should be connected memory Addr[1]