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TM4C123GH6ZXR: CORTEX_M4_0: Error connecting to the target

Mike Tetmeyer
Prodigy 40 points
Part Number: TM4C123GH6ZXR

I am attempting to connect to a new target PCBA using the ICDI debugger tool to an unprogrammed device and getting the error: CORTEX_M4_0: Error connecting to the target.

I have checked the following:

VDD,VDDA,VDDAREF,VDDC power supply signal levels normal.

Oscillator signal levels normal.

Reset signal normal

ICDI connects to a nearly identical target using TM4C123AH6PMI device with same oscillator without issue.

JTAG signals when connecting to target device:

TCLK active

TMS low

TDI data packet transmitted

TDO  remains logic high.

Reset remains logic high (2.8V)

Any suggestions of additional  items to check or try?

  • 0
    TI__Guru**** 158915 points

    Hi,

      Do you have another debug probe (e.g. XDS100, XDS200) that you can use to verify that you can or cannot connect to your board? If a different debug probe can connect to the target then there may be something wrong either with your ICDI connection to the target  or something wrong with the ICDI itself. If a different debug probe cannot connect to the target then it is more a board level issue. Please check section 6 in this app note for jtag troubleshooting. https://www.ti.com/lit/pdf/spma075. Lastly, is there any reason why you will not use a standalone debug probe like XDS100 or XDS200 to debug your target? These are low cost probe, very affordable. If my understanding is correct, you are using the ICDI from a LaunchPad to debug out your custom board with blue wires. I don't think this is the best solution for long term debug. 

  • 0
    Prodigy 40 points

    Output from USB100v2 using Test Connection

    [Start: Texas Instruments XDS100v2 USB Debug Probe_0]

    Execute the command:

    %ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity

    [Result]


    -----[Print the board config pathname(s)]------------------------------------

    C:\Users\MTETME~1.AME\AppData\Local\TEXASI~1\
    CCS\ccs1120\0\0\BrdDat\testBoard.dat

    -----[Print the reset-command software log-file]-----------------------------

    This utility has selected a 100/110/510 class product.
    This utility will load the adapter 'jioserdesusb.dll'.
    The library build date was 'Mar 17 2022'.
    The library build time was '15:43:48'.
    The library package version is '9.7.0.00213'.
    The library component version is '35.35.0.0'.
    The controller does not use a programmable FPGA.
    The controller has a version number of '4' (0x00000004).
    The controller has an insertion length of '0' (0x00000000).
    This utility will attempt to reset the controller.
    This utility has successfully reset the controller.

    -----[Print the reset-command hardware log-file]-----------------------------

    The scan-path will be reset by toggling the JTAG TRST signal.
    The controller is the FTDI FT2232 with USB interface.
    The link from controller to target is direct (without cable).
    The software is configured for FTDI FT2232 features.
    The controller cannot monitor the value on the EMU[0] pin.
    The controller cannot monitor the value on the EMU[1] pin.
    The controller cannot control the timing on output pins.
    The controller cannot control the timing on input pins.
    The scan-path link-delay has been set to exactly '0' (0x0000).

    -----[The log-file for the JTAG TCLK output generated from the PLL]----------

    There is no hardware for programming the JTAG TCLK frequency.

    -----[Measure the source and frequency of the final JTAG TCLKR input]--------

    There is no hardware for measuring the JTAG TCLK frequency.

    -----[Perform the standard path-length test on the JTAG IR and DR]-----------

    This path-length test uses blocks of 64 32-bit words.

    The test for the JTAG IR instruction path-length failed.
    The JTAG IR instruction scan-path is stuck-at-ones.

    The test for the JTAG DR bypass path-length failed.
    The JTAG DR bypass scan-path is stuck-at-ones.

    -----[Perform the Integrity scan-test on the JTAG IR]------------------------

    This test will use blocks of 64 32-bit words.
    This test will be applied just once.

    Do a test using 0xFFFFFFFF.
    Scan tests: 1, skipped: 0, failed: 0
    Do a test using 0x00000000.
    Test 2 Word 0: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 1: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 2: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 3: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 4: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 5: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 6: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 7: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    The details of the first 8 errors have been provided.
    The utility will now report only the count of failed tests.
    Scan tests: 2, skipped: 0, failed: 1
    Do a test using 0xFE03E0E2.
    Scan tests: 3, skipped: 0, failed: 2
    Do a test using 0x01FC1F1D.
    Scan tests: 4, skipped: 0, failed: 3
    Do a test using 0x5533CCAA.
    Scan tests: 5, skipped: 0, failed: 4
    Do a test using 0xAACC3355.
    Scan tests: 6, skipped: 0, failed: 5
    Some of the values were corrupted - 83.3 percent.

    The JTAG IR Integrity scan-test has failed.

    -----[Perform the Integrity scan-test on the JTAG DR]------------------------

    This test will use blocks of 64 32-bit words.
    This test will be applied just once.

    Do a test using 0xFFFFFFFF.
    Scan tests: 1, skipped: 0, failed: 0
    Do a test using 0x00000000.
    Test 2 Word 0: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 1: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 2: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 3: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 4: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 5: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 6: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    Test 2 Word 7: scanned out 0x00000000 and scanned in 0xFFFFFFFF.
    The details of the first 8 errors have been provided.
    The utility will now report only the count of failed tests.
    Scan tests: 2, skipped: 0, failed: 1
    Do a test using 0xFE03E0E2.
    Scan tests: 3, skipped: 0, failed: 2
    Do a test using 0x01FC1F1D.
    Scan tests: 4, skipped: 0, failed: 3
    Do a test using 0x5533CCAA.
    Scan tests: 5, skipped: 0, failed: 4
    Do a test using 0xAACC3355.
    Scan tests: 6, skipped: 0, failed: 5
    Some of the values were corrupted - 83.3 percent.

    The JTAG DR Integrity scan-test has failed.

    [End: Texas Instruments XDS100v2 USB Debug Probe_0]

  • 0 in reply to Mike Tetmeyer
    TI__Guru**** 158915 points

    Ok, your scan chain is somehow broken. Not sure what is wrong.  This is what I will suggest.

     - Compare your schematic with with another schematic you know is working. 

     - Do you have another board of the same type? Is this an isolation board problem or all boards of the same type have this problem? If all boards have this problem then it is certainly a board level design issue. If it is only an isolated problem to one board then you might want to check if the MCU is damaged. When you hard plug from ICDI on a LaunchPad to your target board, I don't know if it induces some EOS (electrical overstress) event.