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RM42L432: Download and run code direct from RAM, can't reach the main procedure

Tomas Lehotsky
Intellectual 995 points
Part Number: RM42L432
Other Parts Discussed in Thread: HALCOGEN

Hi,

I am facing a very strange problem with RM42L432 device. I was create a HALCOGEN project(attached HALCOGEN_Blinky_RAM.zip) and copy the source files to the project. This project blink the LED on N2HET pin(it doesn't matter now). I want to download and run the project direct from RAM(without any touch to the flash locations). I have changed the linker command file(sys_link.cmd) as follows:

--retain="*(.intvecs)"

*----------------------------------------------------------------------------*/
/* Memory Map                                                                 */

MEMORY
{
    VECTORS (X)  : origin=0x08000D00 length=0x00000020
    STACKS  (RW) : origin=0x08000000 length=0x00000D00
    RAM     (RW) : origin=0x08000d20 length=0x000072E0
}

/*----------------------------------------------------------------------------*/
/* Section Configuration                                                      */

SECTIONS
{
    .intvecs : {} > VECTORS
    .text    : {} > RAM
    .const   : {} > RAM
    .cinit   : {} > RAM
    .pinit   : {} > RAM
    .bss     : {} > RAM
    .data    : {} > RAM
	.sysmem  : {} > RAM
}

After successfull build the project I try to debug it, But I can't reach the main procedure in sys_main.c. And I don't know why... The debug seems to be OK, but nothing is happened. There is only a log info in the console window "CortexR4: GEL Output: Memory Map Setup for Flash @ Address 0x0". Does it means, that code is stuck on address 0x0 at the start of the flash? Why don't go to the RAM location?

I am attaching the code project RM42L432_blinky_RAM.zip for your reference.

Any idea?

Thank you!

Best regards,

Tomas Lehotsky

RM42L432_blinky_RAM.zipHALCOGEN_Blinky_RAM.zip

  • 0
    TI__Guru**** 198576 points

    Hi Tomas,

    The main flash instruction memory is addressed starting at 0x00000000 by default. This is also the reset vector location – the ARM Cortex-Rx processor core starts execution from the reset vector address of 0x00000000 whenever the core gets reset.

    The CPU data RAM is addressed starting at 0x08000000 by default. 


    The device also supports the swapping of the CPU instruction memory (flash) and data memory (RAM). This can be done by configuring the MEM SWAP field of the Bus Matrix Module Control Register 1 (BMMCR1). After swapping, the data RAM is accessed starting from 0x00000000 and the RAM ECC locations are accessed starting from 0x00400000. The flash memory is now accessed starting from 0x08000000.

    You can enable this feature by selecting the "scripts " from CCS top menu bar, then selecting the options to put RAM to address 0x0. Then you can load your code as normal. This method is only for debugging purpose. 

    To make it work by remapping RAM to address 0x0, you also need to make some changes in the startup codes. I suggest to remove all the PBIST and SRAM init functions from your startup code. 

  • 0 in reply to QJ Wang
    TI__Guru**** 198576 points

    If you want to run a portion of your code from SRAM, you need to define two code sections: a load address in flash where the code is saved and a run address in RAM where the code will be executed. Before execution you will need to copy the opcodes from load address to the run address.

    Please refer to linker cmd file of your bootloader example.

  • 0 in reply to QJ Wang
    Intellectual 995 points

    Hi QJ Wang,

    I have been working with the another hercules family members like RM44,RM48 in the past and I do not met the problem like this. Placing the code to the RAM locations(like in my attached cmd file) was enough for running it from the RAM. I don not have a special sections in cmd file for loading from one location and running from the second..
    I have attached complete project, are you able to be more concrete what is needed to change/disable in my project(what copncrete in startup code is needed to change)?

    Thank you!

    Best regards,

    Tomas Lehotsky

  • 0 in reply to Tomas Lehotsky
    TI__Guru**** 198576 points

    Hi Tom,

    As I said that the CPU starts execution from the reset vector address of 0x00000000. If the reset vector is not problem, and CPU won't start properly.

    So the .intvec has to be written to the flash starting at 0x00000000.

  • 0 in reply to QJ Wang
    Intellectual 995 points

    Hi QJ,

    I still do not understand. Why should be the .intvec written to the flash at location of 0x0? I want to load the code direct to RAM and run it from RAM. Not from flash, If my vectors locations in cmd file is declared like this VECTORS (X)  : origin=0x08000D00 length=0x00000020, and .intvecs : {} > VECTORS, why it doesn't reach the RAM but going to the 0x0 flash location? 

    In addition, I am attaching the map file, maybe it can help to see where is the problem?

    Best regards,

    Tomas

    rm42l432_map.zip

  • 0 in reply to QJ Wang
    TI__Guru**** 198576 points
    QJ Wang said:
    If the reset vector is not problem

    Sorry for the typo, should be "If the reset vector is not programmed ..."

  • 0 in reply to Tomas Lehotsky
    TI__Guru**** 198576 points
    Tomas Lehotsky said:
    Why should be the .intvec written to the flash at location of 0x0?

    For ARM Cortex-R devices, the exception vector or interrupt vector has to be placed at either 0x00000000 or location specified for HIVECS (normally it is at 0xFFFF0000). Hercules devices don't support High Exception Vectors (HIVECS). 

  • 0 in reply to Tomas Lehotsky
    TI__Guru**** 198576 points
    Tomas Lehotsky said:
    why it doesn't reach the RAM but going to the 0x0 flash location? 

    After reset, the processor fetches the 1st instruction from 0x00000000 (reset interrupt address) rather than 0x08000000.

  • 0 in reply to QJ Wang
    TI__Guru**** 198576 points

    Hi Tom,

    You can try the "MEM SWAP" feature to load your code to 0x08000000, and execute the code from 0x08000000.

    When using this feature, something in the linker cmd file should be changed:

    SECTIONS
    {
    .intvecs : {} > VECTORS
    .text : {} > FLASH0
    .const : {} > FLASH0
    .cinit : {} > FLASH0
    .pinit : {} > FLASH0
    .bss : {} > FLASH0            //RAM
    .data : {} > FLASH0           //RAM
    .sysmem : {} > FLASH0    //RAM

    /* USER CODE BEGIN (4) */
    /* USER CODE END */
    }

  • 0 in reply to QJ Wang
    Intellectual 995 points

    Hi QJ,

    and what is the difference in compare with my linker command file posted at the start? I call it RAM, you call the memory FLASH0. Without defining the "FLASH0" memory it doesn´t make any sense... So, what is the "MEMORY" definition of your FLASH0?  

  • 0 in reply to Tomas Lehotsky
    Guru 92251 points
    Tomas Lehotsky said:
    Without defining the "FLASH0" memory it doesn´t make any sense... So, what is the "MEMORY" definition of your FLASH0?  

    I think the linker cmd file from QJ makes use of the "MEM SWAP" feature in the RM42L432. From the RM42x 16/32-Bit RISC Flash Microcontroller Technical Reference Manual (Rev. C) :

    The CCS rm42l432.gel script provides menu options to be able to swap the memory map.

  • +1 in reply to Chester Gillon
    Intellectual 995 points

    Hi,

    this post can be closed - I have found the solution to my problem - I have changed the HLACOGEN project and define the main procedure as the ramfunc section. Now everything works.

    Best regards,

    Tomas