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TMS570LS0332: Build-in PU and PD resistors under and after reset

Part Number: TMS570LS0332

The datasheet writes ...

"In the Terminal Functions table below, the "Reset Pull State" is the state of the pull applied to the terminal while nPORRST is low and immediately after nPORRST goes High. The default pull direction may change when software configures the pin for an alternate function. The "Pull Type" is the type of pull asserted when the signal name in bold is enabled for the given terminal by the IOMM control registers."

What happens to the PU/PDs between "immediately after nPORRST" and to when the software configures the ports?

I want to make sure the PU/PW are active until sw configures them.

  • Hi,

    What happens to the PU/PDs between "immediately after nPORRST" and to when the software configures the ports?
    Any pull bias while nPORRST is active is implemented using "special structures" within the I/O cell itself. Once nPORRST is released (goes High) the pull bias is controlled by the module that "owns" the default function for a given terminal.

    For example, if you see the below table 

    The RESET pull state for above pins is given as Pulldown, so the pulldown will be enabled internally till the RESET pin goes high and once the reset pin of the controller goes high then the default functions for the registers will be activated i.e. N2HET and the pull type now depends on the N2HET module. If you verify HETPSL(N2HET Pull Select Register) of the N2HET in the TRM Manual 

    There you can see that default state of the pins is 0, that means the pull down sate will be enabled for the pins and this pulldown will be in enabled state till the either we change value in this register or the pin functionality of the corresponding pin.

    If you note some pins have pull type is fixed instead of programmable,

    In this case the RESET PULL STATE will be continue to apply till the pin functionality changes.

    --

    Thanks,
    Jagadish.