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Original question:

AM2634: How to use the 128 kB TCM in Lockstep mode

AM2634: How to enable R5F0-0/R5F0-1 with QSPI boot mode

Jay Sun
Expert 1095 points

Part Number: AM2634
Other Parts Discussed in Thread: UNIFLASH, SYSCONFIG

Hi Expert

How to enable R5F0-0/R5F0-1 with QSPI boot mode not CCS boot mode
(1)Configure_Dual_Core_mode：How to loading image to R5F0-0/R5F0-1 by uart uniflash?
(2)Configure_Lockstep_mode：How to config lockstep mode on R5F0-0/R5F0-1?

BR

JAY

  • 0
    TI__Expert 7586 points

    Hi Jay

    (1) To load the multi-core image by uni-flash you can follow the steps documented here:

    https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/TOOLS_FLASH.html#TOOLS_FLASH_UART_UNIFLASH

    (2) By default, after a device reset, both R5SS0 and R5SS1 are in lockstep. Each cluster can be independently configured to be in dual core by the application.

    The R5SS0_CONTROL register configures the lockstep/dual core behavior of R5SS0. When R5SS0_CONTROL.LOCK_STEP is progammed to 0x7, it configures R5SS0 to be in lockstep. When programmed to 0x0, it configures R5SS0 to be in dual core mode. 

    Similarly, The R5SS1_CONTROL register is used to configure the lockstep/Dual core behavior of R5SS1.

    A reset must be issued to R5SS0 to switch between dual core and lockstep mode. When R5SS0_CONTROL.RESET_FSM_TRIGGER is programmed to 0x7, it issues a reset to R5SS0.

  • 0 in reply to Sri Vidya Gunturi
    TI__Expert 7586 points

    Hi Jay

    The following is the current flow:

    1. After Power On Reset, the R5F0 core is initially in Lockstep mode.

    2. If your app image contains code for both cores, then our  SBL configures it into Dual Core mode.

    3. If your app image contains code only for a single core, then it is configured to Lockstep mode.

    4. This configuration cannot be changed again once set. Only the next Power On reset can modify the configuration you need.

    If you already have a single core image and using our SBL, then your core will be configured into lockstep automatically and there is nothing you need to do. 

    Could you tell me if you are looking to change your dual core image into lock step?

    Regards

    Sri Vidya

  • 0 in reply to Sri Vidya Gunturi
    Expert 1095 points

    Hi Sri Vidya

    (1)Our app image only for a single core which code base on examples\networking\lwip\enet_lwip_cpsw, which only generate  R5F0 image

    => In this case, after uniflash appimage, then power on with qsbi boot mode which will configured to Lockstep mode. it is correct?

    (2)If we need dual core image, How to generate dual core appimage from ccs project? How to config R5F0/R5F1 appimage offset?

    (3)How to config default_sbl_qspi.cfg for dual core uniflash image?

    BR

    JAY

  • +1 in reply to Jay Sun
    TI__Expert 7586 points

    Hi Jay

    (1)  Yes, it is configured to Lockstep mode.

    • For more information: mcu_plus_sdk/docs/api_guide_am263x/DRIVERS_BOOTLOADER_PAGE.html

    (2) To generate dual core image you can import example projects like:

    • "examples\empty\am263x-cc\system_freertos"
    • "examples/drivers/ipc/ipc_notify_echo".

    This automatically configures into dual core mode.

    • If you want to force configure a project to work in dual core mode through CCS, then you can do it through the gel files. 
    • GEL File: ccs\ccs_base\emulation\gel\AM263x\AM263x.gel.
    • Here modify "mode = AM263x_Check_supported_mode();" to "mode = 1;" and issue a system reset or power on reset.
    • With this change CCS always configures the device in "Dual Core Mode" and all four R5 cores can be used. To revert to Lockstep Mode, undo this change.

    (3) Currently, there is no provision for user to configure dual core mode through sbl manually or in the .cfg file. The SBL will switch to Dual core or continue in lock step mode depending on whether App Image loaded by SBL contains the R5 Core 1 image or not.

    • If the App Image to be loaded contains the R5 core 1 binary
      • The SBL will configure R5 to switch to Dual Core Mode using SOC_rcmR5ConfigDualCore(cpuId);
      • At the end of SBL flow, The Application image of R5 will start running in the dual core mode.
    • If the App Image doesnot contain the R5 core 1 binary
      • The SBL will not configure R5 to switch to Dual core Mode
      • At the end of SBL flow, The Application image of R5 will start running in the lock step mode.

    Indirect Method SBL: If you still want a dual core mode, you can create a dummy project for the other core. So when SBL tries to load CPU, it will consider it as 2 Core Images and loads the CPU into Dual Core Mode.

    Could you tell us why do you want to configure into Dual Core Mode when you need only single core Image? This would help us to understand your use case.

    Regards

    Sri Vidya

  • 0 in reply to Sri Vidya Gunturi
    Expert 1095 points

    Hi Sri Vidya

    Sri Vidya Gunturi said:

    (2) To generate dual core image you can import example projects like:

    • "examples\empty\am263x-cc\system_freertos"
    • "examples/drivers/ipc/ipc_notify_echo".

    If we need uniflash to QSPI FLASH, How to combine this two project into one appimage? 

    Sri Vidya Gunturi said:
    Could you tell us why do you want to configure into Dual Core Mode when you need only single core Image? This would help us to understand your use case.

    We need Dual Core Mode for other project which need application for R5 core 1.

    For example :

    (1)R5core 0 for lwip function

    (2)R5core 1 for IO function

    BR

    Jay

  • 0 in reply to Jay Sun
    TI__Expert 7586 points

    Hi Jay

    I will work on it and respond as soon as possible. Meanwhile you may check this below link under section  Multi-core Image Gen :

    https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/TOOLS_BOOT.html#autotoc_md744

    Regards

    Sri Vidya

  • +1 in reply to Sri Vidya Gunturi
    TI__Expert 7586 points

    Hi Jay

    As you have mentioned

    (1)R5core 0 for lwip function

    (2)R5core 1 for IO function

    • You can import  lwip example project into CCS -- which is core 0 project.
    • Then import empty example project -- which is core 1 project (location - mcu_plus_sdk\examples\empty\am263x-cc\r5fss0-1_nortos)
    • Both the projects can be configured and Built individually
    • After building, we get .rprc files for both the projects
    • Combine these .rprc to form a dualcore .appimage using the following command
      • cd ${SDK_INSTALL_PATH}/tools/boot/multicoreImageGen
        ${NODE} multicoreImageGen.js --devID {DEV_ID} --out {Output image file (.appimage)} {core 1 rprc file}@{core 1 id} [ {core n rprc file}@{core n id} ... ]
      • For more information refer: https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/TOOLS_BOOT.html#autotoc_md744
      • Example: 
      • C:\ti\{sysconfig}\nodejs\node C:\ti\{mcu_plus_sdk}/tools/boot/multicoreImageGen/multicoreImageGen.js --devID 55 --out Debug/Combined.debug.appimage ../gpio_led_blink_am263x-cc_r5fss0-0_nortos_ti-arm-clang/Debug/gpio_led_blink_am263x-cc_r5fss0-0_nortos_ti-arm-clang.rprc@0 ../empty_am263x-cc_r5fss0-1_freertos_ti-arm-clang/Debug/empty_am263x-cc_r5fss0-1_freertos_ti-arm-clang.rprc@1
    • Edit your default_sbl_qspi.cfg to add the newly generated .appimage location
      • --file=sbl_prebuilt/am263x-cc/Combined.debug.appimage --operation=flash --flash-offset=0x80000

    Regards

    Sri Vidya

  • 0 in reply to Sri Vidya Gunturi
    Expert 1095 points

    Hi Sri Vidya

    We following your step

    (1)we try to build 2 rprc

    -core 0 project.:examples\empty\am263x-cc\r5fss0-0_freertos

    -core 1 project.:examples\empty\am263x-cc\r5fss0-2_freertos

    empty_am263x-cc_r5fss0-0_freertos_ti-arm-clang.zipempty_am263x-cc_r5fss0-1_freertos_ti-arm-clang.zip

    (2)we Combine these *.rprc 

    C:\TI\sysconfig_1.13.0\nodejs\node C:\ti\mcu_plus_sdk_am263x_08_03_00_23\tools\boot\multicoreImageGen\multicoreImageGen.js --devID 55 --out Combined.debug.appimage empty_am263x-cc_r5fss0-0_freertos_ti-arm-clang.rprc@0 empty_am263x-cc_r5fss0-1_freertos_ti-arm-clang.rprc@1
    Combined.debug.zip

    (3)Flashing the files

    python uart_bootloader.py -p COM3 --bootloader="sbl_prebuilt\am263x-cc\sbl_uart.release.tiimage" --file=sbl_prebuilt\am263x-cc\Combined.debug.appimage

    (4)reboot with QSPI boot mode 

    we can boot as following log, show r5f0-0 bootloader log, how to check r5f0-1 bootloader log?

    or we missing config? 

    BR

    Jay

  • 0 in reply to Jay Sun
    TI__Expert 7586 points

    Hi Jay

    Regarding step (2)

    If you are using example project itself, then a system project will be created for core0_0 and core0_1. This has a make file to give you a combined.appimage output, hence you dont have to run the multicoreImageGen.js command.

    For more information on how this can be done:

    https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/EXAMPLES_EMPTY.html

    All the four cores: 

    https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/EXAMPLES_DRIVERS_IPC_NOTIFY_ECHO.html

    Regards

    Sri Vidya

  • 0 in reply to Sri Vidya Gunturi
    TI__Expert 7586 points

    empty_am263x-cc_r5fss0-0_freertos_ti-arm-clang

    empty_am263x-cc_r5fss0-1_freertos_ti-arm-clang

    empty_am263x-cc_system_freertos

    All the above three projects need to be there in CCS for the system Project.

    Your combined appimage will be present in the location : empty_am263x-cc_system_freertos\Debug\empty_system.appimage

  • +1 in reply to Sri Vidya Gunturi
    TI__Expert 7586 points

    Hi Jay

    Regarding step (4)

    SBL is always executed from core0_0 and at that time core0_1 is in WFI (waiting for Interrupt) state.

    The bootloader log you are seeing is coming from the SBL code. You can find this code in examples\drivers\boot\sbl_qspi\am263x-cc\r5fss0-0_nortos\main.c.

    Once the SBL is completely executed, the required cores are resumed.

    Regards

    Sri Vidya

  • 0 in reply to Sri Vidya Gunturi
    TI__Expert 7586 points

    For more information on how SBL is booted, refer to section Preparing the SBL for boot in the below link:

    https://software-dl.ti.com/mcu-plus-sdk/esd/AM263X/latest/exports/docs/api_guide_am263x/BOOTFLOW_GUIDE.html