[FAQ] TMS570LC4357: Questions regarding F021 Flash erase and program on Hercules devices (TMS570LCx, TMS570LSx, RM4x, and RM57Lx)

1. Can F021 Flash APIs run in user mode?

No, the F021 Flash APIs must be run in a privileged mode (a mode other than user) to allow access to the Flash memory controller registers.

2. How does RWAIT work?

The CPU runs faster than the flash memory. Wait states are cycles the CPU must wait in order to retrieve data from the flash memory which has access times longer than a CPU clock.

The TCM flash (flash on Cortex-R4 devices) can support zero address and data wait states up to a CPU speed of 55 MHz in non-pipelined mode. The TCM flash supports a maximum CPU clock speed of 220 MHz in pipelined mode with one address wait state and three data wait states.

L2FMC (Flash on Cortex-R5F devices) can support zero data wait state up to 45 MHz in non-pipelined mode. L2 flash is clocked by HCLK and is limited to maximum 150 MHz.

The number of wait states is correlated to HCLK frequency. The required wait states for each HCLK frequency can be found in the device-specific data sheet.

3. Can we change the device system clock before erasing or programming the flash?

Yes, but the Fapi_initializeFlashBanks(), and Fapi_setActiveFlashBank() must be called again before any asynchronous flash operations.

4. How to calculate and program ECC to ECC space when programming the data to flash?

There are four programming modes of Fapi_issueProgrammingCommand(). Fapi_AutoEccGeneration will enable the API to be used to program the supplied data portion in Flash along with automatically generated ECC. ECC is calculated on 64-bit aligned addresses up to the data width of the bank.

5. Can I use big data buffer when programming the flash using Fapi_issueProgrammingCommand()?

The size of the data buffer can be any size between 1 bytes and the flash bank width. The bank width of TCM flash (flash on Cortex-R4 devices) is 16 bytes, and the bank width of L2FMC is 32 bytes. Please find the bank width in flash bank configuration register (FCFG_BANK ).

6. Can we erase/program one flash sector in the same bank?

All of the Flash APIs that program, erase, blank check or margin verify must be called from a bank other than the one in which code is being executed. If programming or erasing bank 0 of the device which has only one flash bank, these routines must be executed in RAM.

7. Does Cortex-R5F device use the same flash API library as Cortex-R4F device?

No, they use different flash API library. Cortex-R5F devices (TMS570LC43x, and RM57Lx) use L2FMC flash memory controller which is different from TCM flash used on Cortex-R4 devices. The flash API library with the suffix of “_L2FMC”

8. Why do I get error when performing blank check on TMC570LC43x device?

The flash memory is protected by Single Error Correction Double Error Detection (SECDED). On this Cortex-R5 based device, ECC is enabled by default. Erasing is done on Flash memory without the ECC being programmed. So reading a location with invalid ECC will generate correctable or uncorrectable error.

9. Are Interrupts disabled inside the Flash APIs?

The interrupts are not disabled inside the flash APIs. It is recommended that you disable the interrupts before calling flash APIs.

10. Can Flash API library run from RAM instead of Flash?

Yes, it is possible. Please refer to CAN bootloader examples in Hercules examples git repo. http://git.ti.com/hercules_examples

11. Is it mandatory to use the F021 Flash API to erase/program the Flash on Hercules parts?

Use of F021 Flash API is mandatory for anyone implementing routines to erase / program Flash memory on Hercules parts.

12. Can I get the source code for the F021 Flash API?

Yes, the source code can be provided with a NDA. However, recompiling or redistributing the source is not allowed.

13. What is the compiler version used for generating the F021 Flash API library?

F021 Flash API was compiled using TI’s code generation tools for ARM version 5.1.3.

14. Can the F021 Flash API be compiled with newer version of the ARM Compiler from TI / IAR / KEIL / GCC?

The F021 Flash API library is distributed in the ARM standard EABI ELF format and is compiled using TI’s code generation tools for ARM version 5.1.3. Users are not expected to recompile this library in any way, as then the specified functionality is not verified / supported any more.

15. Can this F021 Flash library be used in code projects using any other tool chain? Are there any constraints or restrictions?

The F021 Flash API library can be used in any code project that uses tools compliant to the ARM standard EABI format.

16. Is therte an example of using F021 Flas APIs?

Yes. Examples using F021 Flash API can typically be found in bootloader code. Please refer to CAN bootloader as example:

Please refer to readme.txt to import the CAN bootloader for a particular platform into Code Composer Studio.

The F021 Flash API is called from .\SafetyMCU_Bootloaders\source\bl_flash.c.

bl_flash.c can be used as a reference to implement your application specific functions to call F021 Flash APIs.

17. Is the F021 Flash API compatible to IAR?

    The F021 library is compatible with IAR v7.x and older version compiler, abd incompatible with IAR C 8.x compiler:

    The F021 Flash API library is okay to use in IAR projects that require using the flash API up to v7.x of IAR’s ARM compiler. Starting from v8.x of IAR ARM compiler, the wchar data type was changed to be 32-bit wide instead of 16-bit wide. This causes warnings to be created any time someone uses any library not compiled using IAR’s v8.x. Safety-critical application developers are not allowed to ignore compiler warnings.

    The solution is to use the old IAR C 7.x compiler