After the flash is erased, why the flash content doesn't become 0xFFFFFFFF?
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After the flash is erased, why the flash content doesn't become 0xFFFFFFFF?
Hi,
The Flash memory is protected by Single Error Correction Double Error Detection (SECDED). This protection is enabled by the SECDED circuit inside of the CPU. For TMS570LC43x and RM57Lx ARM Cortex-R5 based MCUs, the SECDED logic inside the CPU is permanently enabled by default. But for TMS570LSx ARM Cortex-R4F based devices, the flash ECC is not enabled by default and must be enabled by the application.
There is an 8-bit ECC for every 64 bits of data. The ECC for the flash region is stored in the flash itself, and is mapped to a region starting at 0xF0400000 for the main flash bank 0.
When the flash is erased, it's ECC region is also erased. The content in both regions are 0xFFFFFFFF, this means that the ECC region has wrong ECC value (0xFF) for the content (0xFFFFFFFFFFFFFFFF) in main flash region. When reading from the flash region, the SECDED logic will detect the ECC/data error and correct the single-bit errors. This is why the some bit of content in CCS browser is flipped.
One solution is to use the Linker CMD file to generate ECC. Please see my note regarding the generating ECC using Linker CMD file: