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SW-EK-TM4C129EXL: SSI reference design pointer needed

Karl Pedersen
Prodigy 10 points
Part Number: SW-EK-TM4C129EXL
Other Parts Discussed in Thread: EK-TM4C1294XL

I'm having trouble determining which pins and software controls will to properly do bi-mode SSI.

The frame sync pin function is not fully clear. 

My design uses two shift loops of 19 '595 devices each to assert many control bits.  Data readback of the commanded values are not strictly needed but would be helpful for board debug.

Where do I find an example design showing the bi-mode hookup and software controls needed for this?  

  • 0
    TI__Guru*** 132915 points

    Hello Karl,

    We don't have an exact bi-mode example, but in TivaWare 2.2.0.295 we released a quad-mode example and the same software setup and flow applies for both bi and quad modes. So I'd recommend you start there, and if you find there is something there which doesn't match up with your use case, follow-up here and I can try and help further.

    The example can be found here: [Install Path]\TivaWare_C_Series-2.2.0.295\examples\boards\ek-tm4c1294xl\ssi_quad_mode

    Best Regards,

    Ralph Jacobi

  • 0 in reply to Ralph Jacobi
    Prodigy 10 points

    Hi Ralph

    This partly answers my questions.

    I now understand which pins are used.  I see how to clear the input FIFO before a transaction.

    What's unclear is if and how the frame sync is used and the exact software control needed.

    The slave device is a simple shift loop chain of '595 slave devices with the written value looped back to the master as a check.  The shift registers use serial data and serial clock, but no frame sync signal.  Particularly unclear is what frame sync signal is needed on the TM4C master during read.

    Maybe the frame sync is just looped back from output to input, but I'm unclear on this point.  What is the proper connection and programming for frame sync in this case?

  • +1 in reply to Karl Pedersen
    TI__Guru*** 132915 points

    Hello Karl,

    If by 'frame sync' you mean Fss, that's effectively just the SS line of a standard SPI interface. It's meant to help select devices where the SPI interface is only enabled when a signal pulls the SS line down. That said, many user's find that the SSI automatic control of Fss is too limited for their needs and substitute it with a GPIO instead to control the target device's behavior.

    The reason I explained that is to highlight that the SSI can be used without using the Fss signal on the peripheral and that is commonly done. So for your use case where there is no SS line needed, then you can just not configure it and use the SSI for the data lines and clock without issue.

    Best Regards,

    Ralph Jacobi