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MSP432E411Y: Dual chip select problem of EPI

Part Number: MSP432E411Y

Hi,

I've used the EPI with the following settings now.

ECADR = 0x00
EPADR = 0x01
ERADR = 0x01

CS0n must be active when accessing 0xA000.0000.
CS1n must be active when accessing 0x6000.0000.

However, the actual operation is as follows.

CS0n is asserted when accessing 0x6000.0000
CS1n is asserted when accessing 0xA000.0000

Are CS0 and CS1 swapped?

There is a similar case for EPI at the link below. However, the MSP432E4 errata sheet does not list this issue.

https://e2e.ti.com/support/microcontrollers/c2000-microcontrollers-group/c2000/f/c2000-microcontrollers-forum/335477/dual-chip-select-problem-of-epi-tms320f28m35h52c1

https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/431469/problem-on-tm4c129x-epi-dual-chip-select

Best regards,
Sasaki