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TMDS273GPEVM: 40MHz clock out

user244678
Expert 1095 points
Part Number: TMDS273GPEVM
Other Parts Discussed in Thread: AWR2243,

Hi,

Please tell me how to output 40MHz clock from EVM.

I want to supply a 40MHz square wave clock to an external AWR2243.

Best Regrads,

Hiroyuki Taguchi

  • 0
    TI__Prodigy 290 points

    Hi Hiroyuki Taguchi,

    Apologies for the delay.

    PAD_DF(Ball number J1) of AM273, can be routed to have MCU_CLKOUT. This PAD_DF is connected to Connector J7, Pin 4 on the TMDS273GPEVM.

    For 40MHz to be routed to this PAD_DF(Ball number J1), please configure the below registers.

    • To Pinmux PAD_DF to MCU_CLKOUT, please set 0x020C014C to 0x06.
    • To select source clock for MCU_CLKOUT as 40MHz (from XTALCLK), please set MCUCLKOUT_CLK_SRC_SEL register with address 0x0214001C to 0x666.
    • To ungate the clock set MCUCLKOUT_CLK_GATE register with address 0x02140088 to 0x0.

    NOTE: The RCM/TOPRCM registers might be multibit write.

    Also, I see there is some inconsistency with the source clocks in TRM. We will update that.

    Thanks,

    Tejas Kulakarni

  • 0 in reply to Tejas Kulakarni
    Expert 1095 points

    Hi Tejas,

    Thank you fo your reply.

    Please tell me one more thing.

    Is the XTALCLK source signal output from MCU_CLKOUT?

    Or maybe 40MHz divided to 40MHz after taking the PLL?

    Best Regards,

    Hiroyuki

  • +1 in reply to user244678
    TI__Prodigy 290 points

    Hi Hiroyuki Taguchi,

    Yes, the XTALCLK is selected as source for MCU_CLKOUT when the MCUCLKOUT_CLK_SRC_SEL register with address 0x0214001C is set to 0x666.

    Tejas Kulakarni said:
    To select source clock for MCU_CLKOUT as 40MHz (from XTALCLK), please set MCUCLKOUT_CLK_SRC_SEL register with address 0x0214001C to 0x666.

    If you need to divide the selected source clock of MCU_CLKOUT, please look at programming the register MCUCLKOUT_DIV_VAL with address 0x02140048.

    Thanks,

    Tejas Kulakarni