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TMS570LS0914: clear receive Buffer of mibspi

Part Number: TMS570LS0914

Dear TI Team,

We are using one Mibspi port in slave mode. We configured the port that After 12 bytes, there should be an IRQ.

What will happen, if we get on time less than 12 bytes. Lets say e.g. 8 Bytes. how will the IRQ proceed, when we get the next time 12Bytes again?

Will the next IRQ trigger after 8+4Buffer? Or does the IRQ trigger after receiving 12 coherent bytes?

It is possible to clear the buffer of 8 Bytes to reset that port?

Best Regards,

Thorben

  • Thorben,

    I started to work on your issue and i will give you an update soon.

    --

    Thanks & Regards,
    Jagadish.

  • Hi Thorben,

    I never test it practically but for my understanding is below

    What will happen, if we get on time less than 12 bytes. Lets say e.g. 8 Bytes. how will the IRQ proceed, when we get the next time 12Bytes again?

    It won't generate any IRQ interrupt, if we received less bytes than configured number of bytes.

    Will the next IRQ trigger after 8+4Buffer?

    Yes, the next IRQ will trigger after 8+4 bytes.

    It is possible to clear the buffer of 8 Bytes to reset that port?

    In this case, we can configure one periodic timer externally to the MibSPI with certain period based on our requirement, and we can reset this timer in every successful IRQ. But if we got less number of bytes than configured one then this timer will get timeout and we can manually read the buffer instead of waiting for the IRQ.

    And i will again want to test these things at my end practically.

    --

    Thanks & Regards,
    Jagadish.