This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TM4C123GH6PM: Raising ADC Sampling Rate over the 'maximum'

Part Number: TM4C123GH6PM

Hi Everyone,

I would like to sample some signals with a higher sampling rate than the effective sampling rate of the two ADCs (e.g., instead of 1 MHz maximum sampling, I would like to sample at 1.5-3 MHz). I know of the possibility of sample phase control, but as I have more than one signal, I don't think I can use it.

According to this topic on Stackoverflow it is possible to use multiple channels of an ADC to raise the effective sampling rate over the maximum sampling rate of the given ADC, if the ADC sequences through the channels.

My question is, is there some possibility to "go over" the 1 MSPS (1 MHz) sampling rate of this ADC, if so, which settings of the ADCs on this uC allow this (except the use of the sample phase control)?

Thank you for your answers in advance,

Best regards,

Zsolt

  • Hi,

      Yes, you can use two ADC modules to sample the same input at a 180 degree phase difference to double the sampling rate from 1Msps to 2Msps. Please refer to section 13.3.2.5 Sample Phase Control in the datasheet for detail. Below is an excerpt. 

    13.3.2.5 Sample Phase Control
    The trigger source for ADC0 and ADC1 may be independent or the two ADC modules may operate
    from the same trigger source and operate on the same or different inputs. If the converters are
    running at the same sample rate, they may be configured to start the conversions coincidentally or
    with one of 15 different discrete phases relative to each other. The sample time can be delayed
    from the standard sampling time in 22.5° increments up to 337.5º using the ADC Sample Phase
    Control (ADCSPC) register. Figure 13-3 on page 804 shows an example of various phase
    relationships at a 1 Msps rate.

    This feature can be used to double the sampling rate of an input. Both ADC module 0 and ADC
    module 1 can be programmed to sample the same input. ADC module 0 could sample at the standard

    position (the PHASE field in the ADCSPC register is 0x0). ADC module 1 can be configured to sample
    at 180 (PHASE = 0x8). The two modules can be be synchronized using the GSYNC and SYNCWAIT
    bits in the ADC Processor Sample Sequence Initiate (ADCPSSI) register. Software could then
    combine the results from the two modules to create a sample rate of one million samples/second
    at 16 MHz as shown in Figure 13-4 on page 805

  • Dear Charles,

    Thank you for the fast answer. Though as I said, I have multiple inputs and I want to sample them all with higher sample rate, at the same time. What you suggest only works for one input / signal, and not multiple simultaneously. Or can it be applied to multiple inputs, simultaneously?

    Best regards,

    Zsolt

  • Hi,

      I suppose it will apply to all AINx pins as the PHASE will be applied to all of them. 

    Register 10: ADC Sample Phase Control (ADCSPC), offset 0x024
    This register allows the ADC module to sample at one of 16 different discrete phases from 0.0°
    through 337.5°. For example, the sample rate could be effectively doubled by sampling a signal
    using one ADC module configured with the standard sample time and the second ADC module
    configured with a 180.0° phase lag.
    Note: Care should be taken when the PHASE field is non-zero, as the resulting delay in sampling
    the AINx input may result in undesirable system consequences. The time from ADC trigger
    to sample is increased and could make the response time longer than anticipated. The
    added latency could have ramifications in the system design. Designers should carefully
    consider the impact of this delay.

  • Thank you, I think we are getting there. Now I only need to see that an ADC can sample multiple input signals on multiple pins at the same time - or, if not at the same time, I need to know the delays, or at least, on which scale are they present, if the sampling is only quasi-simultaneous: nanosecs? Microsecs? I saw some timing diagrams in the datasheet but they were not quantified as far as I can recall, for my case.

    Right now, based on these what we discussed, I imagine the sampling order the following way: no simultaneous multiple-input sampling by 1 ADC exists, but the ADC quickly switches over all the inputs, e.g., with nanosec delays - so it is 'quasi-simultaneous'. And the other ADC does the same with the given phase-shift.

    Am I thinking the right direction? And can you please also provide some reference for these timing delays?

    Best regards,

    Zsolt

  • I did some more digging, and my doubts seem to be confirmed in this post:

    https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/452127/fast-adc-simultaneous-readings

    Please, if you know any other method to sample multiple channels simultaneously with higher than normal sampling rate, then share it. Otherwise, I need to take the answers from the post as a "solution" and look for some other method to solve it. Disappointed

  • Right now, based on these what we discussed, I imagine the sampling order the following way: no simultaneous multiple-input sampling by 1 ADC exists, but the ADC quickly switches over all the inputs, e.g., with nanosec delays - so it is 'quasi-simultaneous'. And the other ADC does the same with the given phase-shift.

    It is not an analog delay in an uncontrolled amount of nanoseconds. If you look at the waveform below, phase shift of 180degree is to delay the sampling until the 9th ADC clock for the second ADC tied to the same channel. It takes 16 ADC clocks to finish conversion of one sample. ADC clock runs at 16Mhz and this is how you can 1Msps. Delaying by 180degree is to delay for the second ADC until the 9th ADC clock of the first ADC in a controlled phase shift. I will suggest you try it out with one channel in a sample sequencer first. If you can get it to work then add another channel to the same sample sequencer so you will have multiple channels. 

    Also to give a heads-up, I will be on vacation until next Wednesday and my response will be delayed.