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TMS570LS0914: how can i check that SPI CS is asserted low in Slave mode

Part Number: TMS570LS0914

Dear TI-Support Team,

How can i monitor the CS-status, when the spi node is in slave mode?

Background information:

We have implemented a communication system with 2 SPI nodes. one is operating as slave and the other as a master. Both nodes are connected to the same external device.

Our current objective is to cease data transmission on the master node while concurrently receiving data on the slave node. We cant use multibuffer for the receiving node.

Best regards,

Thorben

  • Hi Thorben,

    Actually, application don't need CS to send data from slave device.

    It will work as below,

    Consider polling mode example transmit function.

    The first byte will be directly written into the DAT1 register of the slave SPI device, but this data will not get transmitted to the Master until master chip selects the slave and give clock, so once master chip selects the slave and gave the clock master and slave will exchange their data in full duplex mode. Once the slave received its first data from master RXINTFLG flag will get set at slave side that is why in above code is polling for 8th bit to be set.

    once this bit got set the slave will copy the received first data from master into the buffer and it again will send another data to the master and this operation will continue on.

    So, we just need to give buffer start address and number of data should need to send to this variable.

    I am attaching one example slave code here please go through it.

    SPI_SLAVE_POLL_RM57.zip

    In this example i am sending and receiving 126 16bit data to master from slave.

    --

    Thanks & regards,
    Jagadish.

  • Hey Jagadish,

    i think, my description was not good enough.

    I dont want to send data on my master node while i am receiving data on my slave node. For that purpose i need to monitor CS from slave node.

    Best regards,

    Thorben

  • Hi Thorben,

    I dont want to send data on my master node while i am receiving data on my slave node. For that purpose i need to monitor CS from slave node.

    I never tried but this would work i think 

    you can use SCSDIN bits

    Actually, these bits in SPIPC2 register will provide the logic state of SPICS pin.

    If needed i can test it for you.

    --

    Thanks & regards,
    Jagadish.