If you review the schematic on Pages 3 , and then on Pages 5, there is an error in many pins on Page 3 of the schematic. Many of the pins related to the ETMDATA are wrong, and not connected to the J10 header connector on the HDK. This most likley impacts the TMS570LS31x HDK as well. The same error is in that schematic.
The following pins have inconsistent pins labeled on Page 3 and 5.
Any of the following pins are incorrect in the schematic on Page 3.
D6,D7,D8,D9,D13,D12,D10,D11,K16,L16,M16,N16,E4,F4,G4,K4,L4,M4,N4,P4,T5,T6,T7,T8
which should be
E6,E7,E8,E9,E13,E12,E10,E11,K15,L15,M15,N15,E5,F5,G5,K5,L5,M5,N5,P5,R5,R6,R7,R8
Therefore, The following pins labeled on the HDK silkscreen , Listed in Table 2-8 in SPNU597A are In correct.
J10 -> 23 - D9 ePWM1A is actually E9
J10 -> 24 - D8 N2HET2[1] is actually E8
J10 -> 25 - D7 N2HET2[2] is actually E7
J10 -> 26 - D6 N2HET2[0] is actually E6
J10 -> 33 - D12 N2HET2[05] is actually E12
J10 -> 36 - D11 N2HET2[[06] is actually E11
J10 -> 37 - D13 N2HET2[04] is actually E13
J10 -> 38 - D10 ePWM1B is actually E10
J10 -> 41 - L16 N2HET2[09] is actually L15
J10 -> 42 - K16 N2HET2[08] is actually k15
J10 -> 43 - N16 N2HET2[11] is actually N15
J10 -> 44 - M16 N2HET2[10] is actually M15
J10 -> 45 - F4 is actually F5
J10 -> 46 - E4 is actually E5
J10 -> 47 - K4 N2HET2[23] is actually K5
J10 -> 48 - G4 is actually G5
J10 -> 49 - M4 N2HET2[17] is actually M5
J10 -> 50 - L4 N2HET2[16] is actually L5
J10 -> 51 - P4 N2HET2[19] is actually P5
J10 -> 52 - N4 N2HET2[18] is actually N5
J10 -> 53 - T6 N2HET2[21] is actually R6
J10 -> 54 - T5 N2HET2[20] is actually R5
J10 -> 55 - T8 N2HET2[23] is actually R8
J10 -> 56 - T7 N2HET2[22] is actually R7
The impact of these errors is that the Silkscreen on the HDK is not correct, and many N2HET2 pins are not brought out to the header, nor is EPWM1A / B brought out. This also means that the ETM TRACE and EMIF Functions are brought out to the HDK J10 Header.
