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TIDM-TM4C129SDRAMNVM: JLink Debug

Lezhong Lin
Prodigy 70 points
Part Number: TIDM-TM4C129SDRAMNVM
Other Parts Discussed in Thread: SEGGER

Good Morning,

I have one more question regarding to debug with the external SDRAM.

I defined one function on the external SDRAM.  When starting debug, it works when using the build-in Stellaris in-circuit interface.  But when using the SEGGER J-Link Emulator, I got the following error message if I checked the Load program option in debug configuration.

CORTEX_M4_0: GEL Output:
Memory Map Initialization Complete
CORTEX_M4_0: File Loader: Verification failed: Values at address 0x61000000 do not match Please verify target memory and memory map.
CORTEX_M4_0: GEL: File: C:\CCS_workplace\blinky.out: a data verification error occurred, file load failed.

So, I had to do 2 times of debug:  the first time to check the Load program option to load the program but cannot continue with the debug.  Then check the Load symbols only option, and continue the debug.

May I know how to fix this issue?

Thank you!

Best Regards,

Lezhong Lin

  • 0
    TI__Guru**** 169826 points

    Hi Lezhong,

      I'm not familiar with J-Link enough to know the difference compared to ICDI.

      I'm a bit unclear with your loading of the blinky.out program.

      Are you trying to load the blinky.out to SDRAM using JTAG?

      What do you mean it works on ICDI? 

      Is the blinky.out the stock TivaWare blinky example or this is a custom blinky that you have initialized the SDRAM controller and have the CPU write some code to the SDRAM and then have the CPU jump to 0x61000000 to execute that code?

  • 0 in reply to Charles Tsai
    TI__Guru**** 169826 points

    Hi Lezhong,

      I have not heard back from you. I will close the thread for now. If you have any update you can write back here and the thread will changes its status to OPEN automatically. 

  • +1
    Prodigy 70 points

    Thank you Charles.  I made it works now.  Could you please close the ticket.

    Best Regards,

    Lezhong Lin