Other Parts Discussed in Thread: C2000WARE, SYSCONFIG
Team,
Customer is able to build, load and run C2000Ware SCI example in the C28x CPU1.
Then trying create a 2nd example to run on C28x CPU2 core does not work.
See exact procedure below.
Can you please help?
Is there a specific procedure to create a project and config to run on the C28x CPU2?
I use for our test the following configuration:
- CCS version: 12.6
- Compiler version: 22.6.1
- SysConfig version: 1.20.0
- Eval board: LAUNCHXL F28P65X
Started by using only CPU1.
I added the internal configuration based on the one core SCI example from the C2000Ware 5.1.0.0 (path: C2000Ware_5_01_00_00\device_support\f28p65x\examples\cpu1) and added the different other functional blocks updating the .syscfg file. Here I added the board information in the project properties by using the -b argument (see figure 1 below).
Then trying to add CPU2:
Try to separate parts of the functional SW blocks and one communication channel to the CPU2 core.
Here I took the “empty_projects” example from the path C2000Ware_5_01_00_00\driverlib\f28p65x\examples\c28x_dual\empty_projects to get more familiar with the two-core concept and the handling of the necessary CCS projects including the syscfg. In the example project the -b option was not set in any kind, and I left it as it was. To not re-create the syscfg by hand once more I took over the syscfg from the working “one core test” above and copied the content into the CPU1 syscfg file of the “dual core example” project. In the first creation phase for the board specific sources, I face some errors because of the LAUNCHXL board pinning specifics in the syscfg file I took over. I exchanged the board specifics to the general pin definitions of the controller with the same GPIO numbers. This leads to a successful build with having all the functionality in CPU1 in the “dual core” projects. As the next step I moved some of the functional blocks in the syscfg dialog (seeing both CPUs and can switch between them) from CPU1 to CPU2 (in detail, the CPU timer 0, the DAC and CAN) with the help of the integrated syscfg functionality to move blocks between the cores. The necessary changes in the main.c files of both projects were also done. With the build I saw that the CPU1 was built successfully including the call of the sysconfig_cli.bat file. For the CPU2 I got an error in the call of the sysconfig_cli.bat as shown in figure 2 below.
The mentioned GPIO8 in the error is the channel A output for the ePWM5 I choose located on the CPU1?
With sticking in this I adapted the syscfg file in a way that I added the board information in the syscfg dialog (see figure 3, the change was done before so both columns are same). After adapting the PinMux options in the different areas in the syscfg as shown in figure 4 I got an error message for both CPUs depicted in figure 5 complaining about the boosterpack1.30.
Thanks in advance,
Anthony
