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TM4C123GH6PM: Issue with bootloader

Anil Kumar
Prodigy 30 points
Part Number: TM4C123GH6PM

Tool/software:

Hello Everyone!!

I am trying to implement custom bootloader for TM4C123GH6PM by considering an example project (boot_serial) available in Tiva library. i have made changes with the communication interface from UART0 to UART1 in  all the required files and can able to build the project but here i am facing an issue ie., in that library example there is a file bl_startup_ccs.s and in my project it is been there as startup_ccs.c i tried to copy the data from .s file to .c file and changed the .c file property to .s but it doesn't got worked and also throwing warnings as 

warning: Data is being written to auto-generated file TM4C_Boot.x1
warning: Data is being written to auto-generated file TM4C_Boot.x2
warning: Data is being written to auto-generated file TM4C_Boot.x3

can't able to know how to configure exactly the ccs.c  file.  Attached the project file please go through it.

Requesting you to help me Out!!!.

Thank you 

ANIL.

TM4C_Boot.zip

  • +1
    TI__Guru**** 182396 points

    Hi,

      If you want to customize the boot_serial example then you can just modify the bl_startup_ccs.s file directly. The TivaWare bootloader example uses assembly code in the bl_startup_ccs.s file to handle the bootloading. If you want to use a different UART such as UART1 then you just need to modify the bl_config.h file. In the bl_config.h file there are below #define for you to specify which UART instance to use for serial bootloader. The example uses UART0. You can change to UART1 or 2 or whatever UART instance you want. 

    //*****************************************************************************
    //
    // Selects the UART as the port for communicating with the boot loader.
    //
    // Depends on: None
    // Exclusive of: CAN_ENABLE_UPDATE, ENET_ENABLE_UPDATE, I2C_ENABLE_UPDATE,
    // SSI_ENABLE_UPDATE, USB_ENABLE_UPDATE
    // Requires: UART_AUTOBAUD or UART_FIXED_BAUDRATE, UART_CLOCK_ENABLE,
    // UARTx_BASE, UART_RXPIN_CLOCK_ENABLE, UART_RXPIN_BASE,
    // UART_RXPIN_PCTL, UART_RXPIN_POS, UART_TXPIN_CLOCK_ENABLE,
    // UART_TXPIN_BASE, UART_TXPIN_PCTL and UART_TXPIN_POS
    //
    //*****************************************************************************
    #define UART_ENABLE_UPDATE

    //*****************************************************************************
    //
    // Enables automatic baud rate detection. This can be used if the crystal
    // frequency is unknown, or if operation at different baud rates is desired.
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: UART_FIXED_BAUDRATE
    // Requires: None
    //
    //*****************************************************************************
    //#define UART_AUTOBAUD

    //*****************************************************************************
    //
    // Selects the baud rate to be used for the UART.
    //
    // Depends on: UART_ENABLE_UPDATE, CRYSTAL_FREQ
    // Exclusive of: UART_AUTOBAUD
    // Requires: None
    //
    //*****************************************************************************
    #define UART_FIXED_BAUDRATE 115200

    //*****************************************************************************
    //
    // Selects the clock enable for the UART peripheral module
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UARTx_BASE
    //
    //*****************************************************************************
    #define UART_CLOCK_ENABLE SYSCTL_RCGCUART_R0

    //*****************************************************************************
    //
    // Selects the base address of the UART peripheral module
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UART_CLOCK_ENABLE
    //
    //*****************************************************************************
    #define UARTx_BASE UART0_BASE

    //*****************************************************************************
    //
    // Selects the clock enable for the GPIO corresponding to UART RX pin
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UART_RXPIN_BASE, UART_RXPIN_PCTL and UART_RXPIN_POS
    //
    //*****************************************************************************
    #define UART_RXPIN_CLOCK_ENABLE SYSCTL_RCGCGPIO_R0

    //*****************************************************************************
    //
    // Selects the base address for the GPIO corresponding to UART RX pin
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UART_RXPIN_CLOCK_ENABLE, UART_RXPIN_PCTL and UART_RXPIN_POS
    //
    //*****************************************************************************
    #define UART_RXPIN_BASE GPIO_PORTA_BASE

    //*****************************************************************************
    //
    // Selects the port control value for the GPIO corresponding to UART RX pin
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UART_RXPIN_CLOCK_ENABLE, UART_RXPIN_BASE and UART_RXPIN_POS
    //
    //*****************************************************************************
    #define UART_RXPIN_PCTL 0x1

    //*****************************************************************************
    //
    // Selects the pin number for the GPIO corresponding to UART RX pin
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UART_RXPIN_CLOCK_ENABLE, UART_RXPIN_BASE and UART_RXPIN_PCTL
    //
    //*****************************************************************************
    #define UART_RXPIN_POS 0

    //*****************************************************************************
    //
    // Selects the clock enable for the GPIO corresponding to UART TX pin
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UART_TXPIN_BASE, UART_TXPIN_PCTL and UART_TXPIN_POS
    //
    //*****************************************************************************
    #define UART_TXPIN_CLOCK_ENABLE SYSCTL_RCGCGPIO_R0

    //*****************************************************************************
    //
    // Selects the base address for the GPIO corresponding to UART TX pin
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UART_TXPIN_CLOCK_ENABLE, UART_TXPIN_PCTL and UART_TXPIN_POS
    //
    //*****************************************************************************
    #define UART_TXPIN_BASE GPIO_PORTA_BASE

    //*****************************************************************************
    //
    // Selects the port control value for the GPIO corresponding to UART TX pin
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UART_TXPIN_CLOCK_ENABLE, UART_TXPIN_BASE and UART_TXPIN_POS
    //
    //*****************************************************************************
    #define UART_TXPIN_PCTL 0x1

    //*****************************************************************************
    //
    // Selects the pin number for the GPIO corresponding to UART TX pin
    //
    // Depends on: UART_ENABLE_UPDATE
    // Exclusive of: None
    // Requires: UART_TXPIN_CLOCK_ENABLE, UART_TXPIN_BASE and UART_TXPIN_PCTL
    //
    //*****************************************************************************
    #define UART_TXPIN_POS 1