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PBIST on TCRAM and external RAM

Other Parts Discussed in Thread: TMS570LS2124, TMS570LS2134

Hello,

I'd like to know something, when the RAM tests are being executed on TCRAM or external RAM, is it possible to keep my application running on that exact same area? Won't the data be deleted? Wheneve I plan on running tests on TCRAM or external RAM should I move the data to another area?

I'm lloking for suggestions, because  I don't want to stop the application from running just because tests are being executed. But I think that for something similar to that I'd need a big workaround (move the data to another region, run the pbist only at a part of the memory, finis the test, move back the data to where it belongs)

  • Hi Pablo,

    The contents of the selected memory before the test will be completly lost. You software must tae care of data backup. The PBIST will not test the external RAM attached to EMIF. The 28 memory groups are listed on table 7-1 in user guide. You can move the data out of the area which will run PBIST test, then move the data back after the test is done. Typically the PBIST tests are carried out at the beginning of application software.

    Regards,

    QJ

  • So then after the boot process is complete the pbist on the memory doesn't need to run again? Even better.

    About the external ram on EMIF, I really thought it was possible, when I saw esram on th list, but ok.

    Thank you very much

  • Hi Pablo,

    It bases on your application. If you want to do the test during the run time, you need to backup the data since all contents of the tested SRAM module are overwritten during the test. ESRAM doesn't mean external SRAM. It is internal RAM starting from 0x08000000.

    Regards,

    QJ

  • QJ,

    This is old thread but I need to understand something ... Thanks in advance!

    For the TMS570LS2124 and TRM spnu499b (page 108), I found the list of 28 RAM/ROM groups under Table 2-5. PBIST Memory Grouping (not Table 7-1). I found that there are ESRAM1, ESRAM5, ESRAM6 and ESRAM8, all of single-port type.

    Are those groups covering the complete 3 MB static RAM of the MCU?

    Why are they separated in so many groups?

    Thanks!

  • Hi Chuck,

    I believe the TMS570LS2124 has 192kB of SRAM, not 3MB.  If you test all of the PBIST eSRAM groups in the device datasheet, you should be covering all of the device SRAM.

    The PBIST works on the SRAM physical instances directly - you are seeing groups of physical SRAM instances in the mapping table.  In some cases we are able to test multiple SRAM instances of the same size in parallel; SRAMs of different physical configuration must be tested separately.

    The configuration of the SRAM modules is defined as a trade-off between speed (frequency) and size.  In general, the more bits implemented, the slower it will be.  In order to support higher frequency operation without waitstates, we typically need to build the memory array from multiple instances of fast but smaller bit count memories.

    Regards,

    Karl

  • Hi Karl,

    You're right. I meant SRAM but was thinking Flash in my head. Beside that my device is actually TMS570LS2134, which has 256 KB RAM and 3 MB Flash.

    Your explanation is understood and makes sense.

    Thank you!