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TM4C129DNCZAD CAN0 Problems

Other Parts Discussed in Thread: TM4C129DNCZAD, TM4C129ENCPDT, TM4C129XNCZAD, TM4C1299NCZAD

Hi,

We have done about 5 boards successfully with TM4C1299ENCPDT (QFP) using CAN, and have the same CAN circuit that has been used many times before.  We have a new layout that uses TM4C129DNCZAD (BGA) and we cannot seem to get the CAN0 interface to work correctly.  As far as I can tell, I cannot find any problems in my layout, but I am not ruling anything out.

Here are the symptoms:

Board #1

-Data comes in as expected on the CAN0Rx line from the CAN bus.

-CAN0Tx line stays high.  No change in the state of CAN0Tx.  I tried using a pull-up resistor or a pull down resistor and no difference was seen.

-Cut the connections to the onboard CAN transceiver (CAN0Rx and CAN0Tx).  I wired in a known good external CAN transceiver module straight to the processor.

-After breaking the connection between CAN0Tx and the Tx input of the CAN transceiver circuit, the Tx input can be toggled high and low, so it is not shorted.  Holding the input High lets bus traffic flow, and grounding it holds the bus.  This is what I expect to see.  Also after that connection was broken, CAN0Tx will drive low over and over again to attempt communication, but it will not work because it is not actually connected.  This also seems correct.  However, if you connect them together again, the CAN0Tx signal just stays high.  It is as if the pin cannot drive the input the transceiver circuit.

-I could not find any specific input impedance of the inverter (that the processor CAN0Tx connects to) in its data sheet, however I assume it should be very high.  This is the same transceiver circuit we always use but a new processor.  I wanted to do a low drive strength test of the processor pin, so I externally took an op amp (AD822 with super high impedance inputs) and wired it as a single supply operation voltage follower with the CAN0Tx tied to the input, because if nothing else it should at least be able to drive the op amp.  When I did this, the op amp output would follow the pulses on the Tx line, but that was still with the output of the op amp floating.  When I connect the output of the op amp to the Tx input on the CAN transceiver circuit, the CAN0Tx (op amp input and output) driving the transceiver stay high again.  The transceiver inverter input has already been verified that it is not shorted.  My mind is totally boggled on this one.  I have no idea if this is a hardware or software problem.

Board #2

This time I used the onboard CAN transceiver, but cut the CAN0Tx trace right before the CAN transceiver like I did before.  I got the exact same results, except when I float the CAN transceiver Tx input, CAN0Tx doesn't try to pull low as much as on board #1.  If I touch the wire to the floating transceiver input with my hand, the Tx line will start attempting to pull low, but when I let go it stops.  Also, when I connect the lines back together again I get the same problem where they just stay high.  I also tried inserting the op amp circuit and got the same results as board #1.  I verified the transceiver input is not shorted and that I can toggle it. 

The behavior is very strange.  I am not ruling anything out.  We have checked all the W10 and V10 GPIO and AFSEL registers for configuring CAN0 and they all look correct.  I cannot find anything wrong in the layout.  I cannot find any bad connections or voltages. 

Any suggestions would be very helpful.  I can have the software engineer provide the initialization code for CAN0 if that is helpful.

Thanks for your time.

Kevin

  • Hello Kevin,

    I think it would be good idea to first eliminate the SW. Can you please share the GPIO configuration for CAN?

    Regards
    Amit
  •   SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOT);
    
      GPIOPinConfigure(GPIO_PT0_CAN0RX);
      GPIOPinConfigure(GPIO_PT1_CAN0TX);
    
      GPIOPinTypeCAN(GPIO_PORTT_BASE, GPIO_PIN_0 | GPIO_PIN_1);

  • Hello James,

    And when you connect the debugger, the CPU is not stuck in a FaultISR?

    Normally I always try to keep the following lines to avoid a Bus Fault due to peripheral delay.

    SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOT);
    while(!(SysCtlPeripheralReady(SYSCTL_PERIPH_GPIOT));

    If the SW is executing without any Bus Fault, etc (basically the CAN not working exempted for the moment), then the next point would be the schematics to review.

    Regards
    Amit
  • No, everything else on the system seems to be working fine. The code is more or less a copy of some existing code that we use on several other projects that are all TM4C based, the TM4C129ENCPDT for example. The only real change to the CAN startup in this case was the change in GPIO from A0 and A1, to T0 and T1. All other tasks are running fine. The CAN is the only peripheral currently used, but I'm driving some LEDs via GPIO that other tasks are driving, and those are working correctly.
  • Hello James,

    With the SW right now ruled out, we need to have a closer look at the schematics and perhaps the layout.

    Regards
    Amit
  • Hi,

    We ordered the DK-TM4C129XNZAD development kit.  I hooked a CAN transceiver to it and James loaded the code on it and the CAN communication was working.  This validates that the code he wrote is good.

    I took the exact same CAN transceiver that was working on the eval kit and hooked it to the prototype and it doesn't work.  He is able to program it with code where the PT1/CAN0Tx and PT0/CAN0Rx pins are set high as GPIO pins, and also another set of code where it is set low as GPIO pins.  This validates that my CAN0Tx and CAN0Rx connections are good underneath the BGA.  This also validates there isn't something shorting the pins (even though I could not measure a short anyway).

    This still does not explain why the chip is able to drive the CAN0Tx line only when the processor CAN0Tx pin it is floating (but still connected to the scope so I can see it).  It will not drive CAN0Tx low when it is connected to the input of the transceiver circuit.  The data on the CAN0Rx is good coming in from the network.  The Tx pin is high and not holding the bus.  Why is this chip not able to drive the signal low on PT1 as CAN0Tx but it can as GPIO PT1?  The code works on the eval kit so this is not a code issue.  There is something wrong with the layout, this physical processor, or the assembly. 

    I even tried replacing all my power bypass caps from 0.22uf up to 4.7uf (including the 2 core caps) in concern that there was not enough available power to the chip, but that made no difference.

    I am still in dire need of assistance on this.  Thanks for your help.

    Kevin

  • Hello Kevin,

    Kevin Wood said:
    This still does not explain why the chip is able to drive the CAN0Tx line only when the processor CAN0Tx pin it is floating

    Do you mean the CAN Transceiver or TM4C driving CAN0TX?

    Regards

    Amit

  • I have a wire coming off the prototype board that is connected only to the CAN0Tx processor pin (I have cut the traces on the top layer that goes to the can transceiver on the board for both Tx and Rx).  The CAN0Tx wire has a quick disconnect terminal on it which connects to a quick disconnect terminal on the can transceiver input wire.  I am using the external CAN transceiver because I know it is working on the eval board. 

    When I put the scope on the processor pin for CAN0Tx, the CAN0Tx signal will always stay high when the two wires are connected.  When the wires are disconnected from each other, the processor pin will start attempting to drive low like it wants to communicate out to the bus, but it cannot because it is disconnected.  It seems to me like something internal to the processor is preventing the signal from driving low, but I don't know why.  I even had tried a couple of weeks ago putting a high speed JFET input op amp voltage follower in between the CAN0Tx line and the CAN transceiver input and that made no difference. 

    I got layers files from our headquarters where the layout was done.  I can send it to you if you wish to see it. 

  • Also, I don't know how to send it to you, so if you want to see it, you will have to tell me where to go to do that.
  • Pardon if this has been included - but cannot you (temporarily) switch to another CAN pin pair - attach to that same CAN Xcvr - and repeat your test?
     
    I recall a client of ours having similar issues w/the "higher Port CAN sub-systems" w/TM4C129.  (higher port = higher alpha listing)

    One more thing - this not covered - your extensive report:  Have you monitored the 3V3 during operation of this particular CAN?   And any (other) lower voltage MCU pins - which may be exposed & capable of being monitored?

    Are you absolutely certain that no (unwanted/unrecognized) signal paths and/or connections exist - which "burden" those CAN signal lines?

    Does your code run up to - and thru - a brief CAN output sequence - normally?   Or does it "hang?"

    Should the CAN Xcvr perform "normally" when excited by another CAN Port - your (failing) CAN port is "highly" suspect!
     
    Applaud your "GPIOing" those CAN pins - to validate that a (proper) signal can be generated - and does fully exercise your CAN Xcvr. I'm betting on that specific MCU CAN Port being, "Not good for Gov't Work!"   (CAN in this instance)

  • Regarding the 3.3V rails on the processor: I have measured the pins to make sure the voltages are correct and not changing or falling with a voltmeter, but I have not watched them with a scope. I had checked them with a meter both before and after upgrading the power and core bypass caps from 0.22uf to 4.7uf. They were always OK.

    Regarding the signal paths, these pins have only one connection path to the CAN transceiver. They are not connected or used for anything else. The fact that we were able to drive these signals correctly as GPIO seems to rule out any kind of a connection integrity issue on the board. We checked the drive strength bits and they were all set correctly. When configured as CAN, the processor cannot even drive the CAN0Tx signal low to a JFET input op amp. As far as everything I can physically see on the board with my eyes, no problematic connections exist. As far as everything in the board layout goes, no problematic connections exist.

    James will have to answer the question regarding the CAN output sequence. (I am the hardware engineer)

    We have two CAN transceivers on this prototype board for two different CAN networks, but part of the way our software works, is the primary functionality of the software is designed to run off CAN0, which all of our boards do. I am not sure we will be able to run test code for the second CAN transceiver if the first is not working. James will have to respond to this. As far as multiplexing CAN0 to port A instead of port T, those pins do not have connections going outside the BGA. We would have tried that if it was available. I wish that had been included in the artwork.

    If this device is suspect, I am tempted to send the boards in to have the processors changed out for the superset device like on the eval board. However, I would like to know whether or not this is an issue in the compiler somewhere before going to all that trouble and cost.
  • Hello Kevin,

    Is it possible to change the CAN0 pins on the board to use PA0 and PA1 if the UART0 is not being used or can be temporarily be disabled.

    Regards
    Amit
  • No PA0 and PA1 are not accessible on this board. There are no traces bringing those pins out.
  • If you guys have an eval board with the same processor we are using, I would be happy to test that theory if you send me a kit.
  • I think you would have to send me a special one though, because my understanding was that an eval kit with the processor we are using does not exist.
  • Have you checked the solder connection/traces? Maybe a PCB or stencil flaw where the trace cracks or there is no paste on the pad. I'm not sure x-ray would pick up all the possibilities and optical inspection is more limited.

    Hmm, when you toggle the pin, how strong a pull-up/dn do you need to keep the output constant? That would give you an idea of how high an effective output impedance you have.

    Robert
  • I don't have any x-ray equipment, but that would be nice to see if I could. If this was a board issue, I would expect to see it unable to drive low as a GPIO pin and whether the pin is configured as CAN would be irrelevant. It drives high and low just fine as GPIO. It acts more like it chooses not to drive low when configured as CAN0 rather than cannot drive low.
  • Hello Kevin,

    We do not have an EVM with the specific TM4C129DNCZAD device. To be able to send the project files you have to accept the "Friend Request" and then you can share the files with us.

    I can try to see if I have a TM4C129DNCZAD device and run it on a TM4C129XNCZAD board to be able to reproduce the issue.

    Also I rechecked the schematic sent by James and it shows the device to be TM4C1299NCZAD. Can you please confirm?

    Regards
    Amit
  • May I state - again - that "CAN issues" have been reported upon the higher (alpha) ordered CAN instantiations - this family MCU. I believe several of these reports landed here (this forum.)

    As the CAN Xcvr behaved when excited under GPIO & alternate drive signals - and you now report that signal paths are clean/clear - the behavior of that specific CAN pin pair "leaps atop" your suspect list...
  • We originally designed it to be TM4C1299NCZAD. This part was not available so Jackie Filby supplied us with the TM4C129DNCZAD which we were told was the same but with the AES encryption block in it. TM4C129DNCZAD is what was physically installed on the board.

    On a side note, the xml file for TM4C1299NCZAD doesn't exist in code composer 5, so we wouldn't have even been able to program it anyway. It actually worked out for us better that we were using TM4C129DNCZAD instead because that part was an option as a usable part in code composer 5.
  • Maybe you have a friendly contract manufacturer or University dept that does?

    In any case I missed that you had tested loaded with GPIO, that does suggest it's the peripheral or config.

    Robert
  • Learning now that a, "very closely related device" did NOT appear w/in CCS device listings (may) cast doubt re: the full/proper configuration of that, "High alpha-ordered, CAN Port!" CAN Code you past furnished passed Amit's (and my) scrutiny - yet those higher ports are newer - and have not received the degree of usage of the more prevalent, lower ports.

    Again - to my mind - that particular CAN instantiation appears "broken" - and that may be due to chip or set-up - or both! Suggest that you compare each/every CAN Register of a "working" CAN Port against this troubling one. (a single errant bit can block a successful config!)
  • I'll have James screenshot the CAN0 bits on the eval board and compare them against the prototype.
  • I think you should also compare against the user manual. I'd highlight differences from other setups even if they seem correct just on the chance someone has made a typo in the manual somewhere.

    Robert
  • After finding the discrepancy in the AFSEL and PCTRL registers that gave us some hope, but the Tx line is still behaving the same way.  The CAN0Tx line still never pulls low.  Are there any other registers you can think of that we can check?  Even without that change, the code worked on the superset device.  I am still leaning towards having a couple boards reworked with the superset device.

  • Might you assist us by "locking down" your earlier report that, "When re-purposing those 2 CAN pins to GPIO Outputs - and making no other board nor program changes - your CAN Xcvr (then) evidenced proper operation!"   Are all of those facts true?

    If all of the above is true - have you "ohmed out" that CAN_TX line - to both VCC and Gnd?   I cannot recall if a pull-up R is on CAN_TX - if one is - measure to insure its value is not far lower than expected.

    If any other CAN modules are present - and working - you may wish to scope both CAN_TX & CAN_RX - and insure that the errant CAN channel well matches those levels obtained from "working CAN channels..."

  • Hello Kevin,

    As we discussed the TivaWare version being used in TI RTOS is old one and at that time only few parts were defined which may point to the discrepancy. Can you please send in the TI RTOS version and the TivaWare version so that it can be checked.

    Regards
    Amit
  • TI RTOS version 1.21.0.9

    Tivaware 2.0.1.11577a

  • Well, the CAN0 has never had proper operation.  When repurposing the same two pins as GPIO, they are correctly driven high and low, with optimum voltage levels, so they work perfectly.  That doesn't test CAN0 though, just the pins.

    I have ohmed out the Tx line, and it is not shorted to 3.3V or GND (measures with it off +50Kohms).  I have also tried both a 10K pullup and a 10K pull down and that had no impact.  We have never needed it in the past, nor does it work on the eval board.

    We do not have the second CAN1 interface working because our code that uses it will not work until the first CAN0 network is working.

  • I am still working on getting a copy of CCS 6 from IT. I am going to try it on my machine when I get it.
  • Hello James,

    I think the misconfiguration is due to the GPIOPinConfigure API returning a failure for ports higher than Q. This was fixed in later TivaWare release (2.1.1.61 onwards)

    Regards
    Amit
  • Hello Kevin,

    Updating to new TI RTOS version and TivaWare would also be suggested atleast on one machine.

    Regards
    Amit
  • It took a while, but I installed CCS6 on my machine and imported the project.  When I program the code on our prototype board I get the same problem - no Tx Signal on CAN0.  It just stays high.  I can also still see traffic coming in on the CAN0Rx line.  I am really leaning towards this being a silicon issue at this point.  I am still looking forward to any potential software solutions to this, but I am getting skeptical of that at this point.  I am open to suggestions.  I am going to send 2 boards back to the vendor for a superset device swap.

  • Hello Kevin,

    OK let us wait on the TM4C129DNCZAD swap to TM4C129XNCZAD. Because if the GPIO toggles correctly, then the pin mapping must remain. I can double check though.

    Regards
    Amit
  • Just to Clarify, you are checking the pin mapping and going to get back to me? We are putting a potential solution on hold for your findings.
  • Hello Kevin,

    I am going to trace the pin map from the CAN peripheral to the IO. But this should not affect your investigation.

    Regards
    Amit
  • Hi Amit,

    Have you found anything new yet in the registers for CAN0 or Port T?

  • Hello Kevin,

    Nothing on my side shows that it should be a problem

    Regards
    Amit
  • OK then I am just going to assume there is a problem with the silicon and will change to the processor that works.
  • Hello Kevin,

    At this point we must make this assumption to eliminate the device as the potential cause.

    Regards
    Amit
  • I have gotten two boards with the processors replaced with the superset device, and I still have the same problem.  This tells me it is probably something with the layout but I am still having trouble finding it.  I feel like I have checked all my pin connections against the eval board.  Since we know we have been able to toggle the pins as GPIO I know the connections are ok to the CAN transceiver.  I have the evaluation kit (which is working) and am trying to figure out how to put CAN0 into test mode on the good board, so that I can try it on the bad prototype board.  I want to put the CAN0 Tx line low manually while configured as CAN.  I change the CAN0 CAN_CTL_TST to be 1, but when I attempt to change CAN_TST_TX I just get an error window that pops up:

    " has encountered a problem.

    An internal error occurred during: "",

    (and under details:)

    An internal error occurred during: "".

    -1

    Why can't I write to CAN_TST_TX?

  • Hi,

    I think you are testing each board alone instead using a real two wire bus and another good working node. An answer to your question(s) here may be found on page 17 of the attached document (CAN2.0B rules...)

    2011-09-06 Texas Instruments CAN PHY Technical Training.pdf

  • Hello Kevin,

    Not sure why there is an issue with writing to the CAN_TST bits. Did you try using the debugger to set the bit in the register?

    Regards
    Amit
  • Yes I have tried that and the notes that I wrote above are the errors that I get.
  • I am using a bus with a known working CAN master. I wish it were that simple. :-/
  • I was also concerned that the compiler was not configured with the right parts after switching to the superset device, but I fixed that and still have the same problem.
  • Hello Kevin,

    We have eliminated all possible root causes, leaving something on the board that may be causing the lines on the CAN side of the transceiver to not work.

    Regards
    Amit
  • Yes that is exactly what I tried to do.  After that wasn't working I even tried doing direct writes using

    //HWREG(0x40040000) = 0x8E;

    //HWREG(0x40040014) = 0xC0;

    and it ended up making all of the registers of the CAN module completely unreadable.  I suppose I wrote the wrong values, but I had to do a full erase and revert those changes to be able to read the CAN module registers after that.

  • Hello Kevin,

    Did you try

    HWREG(0x40040000) |= 0x80;
    HWREG(0x40040014) = 0x10;

    Regards
    Amit
  • The same thing happened as before, where I could not read any of the CAN0 registers when I hard code that in.  I had to revert changes, do a full erase and reprogram to get it to work again.

    Another interesting symptom, is the CANTx is low when the device is fully erased.  Perhaps in full erase the hardware defaults as GPIO and not CAN0 so it can go low at that time.