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External Voltage Monitor for the TMS570 VCC (1v2)

Mike Coombes
Prodigy 150 points
Other Parts Discussed in Thread: TMS570LS3137, TPS3897

The TMS570 has high accuracy requirements on the external voltage monitor for the core supply VCC. [TMS570LS3137]

nPORRST must be active, when VCC (Core voltage) drops below 1.14V

Also the data sheet says that nPORRST should be active 2µS before the voltage dips below 1.14V.

 

In order to achieve this I have implemented monitoring using a TPS3897 and a potential divider to the VCC supply using 0.01% resistors.

My analysis suggests the tolerance of negative going threshold for the assertion of nPORRST, for my circuit using TPS3897 is;

Min 1.15V (1.15V chosen to give a chance at meeting the 2µS parameter)

Max 1.19V

 So with this in mind, over temperature and tolerances of divider networks the minimum VCC supply is 1.2V

 VCC_MIN_ABOVE_VMON_TOLERANCE        = 1.20V  (To avoid nPORRST becoming active)

VCC SETPOINT                                                       = 1.26V

VCC_MAX                                                                = 1.32V

 

So I plan to up the VCC voltage on my SMPS from 1.20V to 1.26V

Is this the optimum solution ?

Raising the core voltage will increase power & heat, but reduce the likely hood of brown out.

Do you have any trimmed ultra high accuracy parts for voltage monitoring of a 1.14V threshold? Such that the VCC voltage can be kept at 1.20V

  • 0
    TI__Guru 72500 points
    Having a nominal voltage of 1.26V is a good solution. The maximum current ratings in the datasheet are based on the maximum core voltage of 1.32V. The 2us requirement is because there is a glitch filter on the nPORRST pin. The requirement to assert nPORRST before Vcc drops below 1.14V is to make sure that reset is asserted before the core logic can fail. The real concern is that while programming or erasing flash (such as during EEPROM emulation) that the high voltage from the flash pump is discharged before the core logic fails.