Other Parts Discussed in Thread: HALCOGEN
I am using HALCoGen generated code for startup in a RM48 processor. I've been going though the code to fully understand what the startup code does and have run into a question on a section of code. The function fmcBus2Check in the sys_selftest.c library seems to disregard a flash OTP one bit error notification if it is detected during startup. The code section in question is shown below. It seems the code evaluates the ESM group 1, channel 40 error and if found, simply clears it before proceeding to the fmcECCcheck function. Granted, the ECC self-test has not been run yet, so the flag could be set in error, but if the ECC does pass its self-test, doesn't the ESM flag really represent a potential fault in the flash OTP?
If the flash OTP 1 bit error is real, the ECC should have corrected it, but its an indication that something may be failing in the flash OTP. No "User code begin/end" statements are provided to allow the user to address this issue. Is this really an issue or is this 1 bit flash OTP error caught somewhere else in the code?
This may be my misunderstanding of when the flash OTP memory locations are utilized. I would assume at this point in MCU start up that many , if not all, of the OTP locations have been transferred to RAM working registers to properly configure the MCU.
Thanks,
Allen
oid fmcBus2Check(void) { /* USER CODE BEGIN (32) */ /* USER CODE END */ /* enable ECC logic inside FMC */ flashWREG->FEDACCTRL1 = 0x000A060AU; if ((esmREG->SR1[0U] & 0x40U) == 0x40U) <--ESM flag is checked { /* a 1-bit error was detected during flash OTP read by flash module run a self-check on ECC logic inside FMC */ /* clear ESM group1 channel 6 flag */ esmREG->SR1[0U] = 0x40U; <- the flag is simply cleared at this point before continuing, no indication of the possible error is stored or flagged fmcECCcheck(); <- the program continues on as if there had been no error detected } /* no 2-bit or 1-bit error detected during power-up */ else { fmcECCcheck(); } /* USER CODE BEGIN (33) */ <-- user code allowed here, but its too late. any evidence of a 1 bit flash OTP error has been lost /* USER CODE END */ }