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TM4C1230E6PM: JTAG Daisy chain configuration

Divya jyothi
Intellectual 810 points
Part Number: TM4C1230E6PM

Hi community,

Please help me to find the solution for the below queries:

1) Please provide the brief information about the JTAG daisy chain configuration.

We are using TI CC1352 and TI TM4C MCU in our design  & we planned to flash both chips by using JTAG Daisy chain configuration.

Please refer the attached image.

a)We set CC1352P reset to 10ms by using RC circuit and TM4C reset to for 1ms. Since there is no additional JTAG resets for each IC. Those IC resets signals have to be controlled by JTAG TAP port ?

How it will be synchronized ? Both IC reset has to be shorted ?

b) In this daisy chain set up requires any additional pull up & pull down resistors (Termination resistors) on JTAG IOs ?

c)Is it possible to flash any one of the MCU by using Bypass mode of the other ?

Thanks & regards,

Divya

  • 0
    TI__Guru 72500 points

    Divya jyothi said:
    a)We set CC1352P reset to 10ms by using RC circuit and TM4C reset to for 1ms. Since there is no additional JTAG resets for each IC. Those IC resets signals have to be controlled by JTAG TAP port ?

    On both of these devices the nRESET pin is an input. Both in your application and while debugging, the reset of the two CPUs will release at different times. How you choose to synchronize the communication between the two should take this into account. From a debug perspective, you might want the two devices to start running from reset relatively at the same time. Here is some information on the Wiki that might help explain how to do that:

    http://processors.wiki.ti.com/index.php/Multi-Core_Debug_with_CCS

    Divya jyothi said:
    b) In this daisy chain set up requires any additional pull up & pull down resistors (Termination resistors) on JTAG IOs ?

    That depends very much on the layout of the JTAG signals. The TCK signal is particularly sensitive to reflections. It should be kept very short with no stubs when routing from connector then to first MCU then to second MCU. Using an AC termination at the last MCU is a good idea.

    Divya jyothi said:
    c)Is it possible to flash any one of the MCU by using Bypass mode of the other ?

    That is how the programming is done. One device is put in bypass while the other is programmed, and then the other way around.

  • 0 in reply to Bob Crosby
    Intellectual 810 points

    Hi Bob,

    Reset signal controlling from TAP is required for JTAG daisy chain configuration ?

    Without reset control from TAP, JTAG programming will work ?

    Thanks & regards,

    Divya

  • 0 in reply to Divya jyothi
    Intellectual 810 points
    AC termination is required only for TCK lines ? it is not required for TMS, TDI & TDO signals ?
    What will be the value of AC termination ?

    Thanks & regards,
    Divya
  • 0 in reply to Divya jyothi
    TI__Guru 72500 points
    The JTAG TAP is reset at power on, and then can be put into the test reset state by holding TMS high for 5 TCK cycles. The JTAG controller takes care of this without the need for a separate reset signal controlled by the JTAG scan controller.
  • 0 in reply to Bob Crosby
    TI__Guru 72500 points
    Termination on TCK is most important as reflections will be seen as an extra clock pulse and will cause the JTAG controller to be out of sync with the device. Proper termination on TMS, and TDI can help achieve higher speeds, but is not critical at lower scan speeds. It is important that you avoid cross talk on all JTAG signals. This is usually an issue in the cabling, not so much in board layout.