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TMS470MF06607: TMS470MF0660x SYS#103

Part Number: TMS470MF06607

I am working on a TMS470 Reset problem

SYS#103 SYS_Nrst Requires Extra VCLK Cycles To Guarantee Complete Device Reset

This is a concern as the product is always ON module so there is no opportunity to manually power cycle it.

Having worked around the problem with an external Watchdog auto power cycle configuration. When the TMS470 fails to start up correctly the device is power cycled by the external watchdog. On occasions when it fails to start up correctly you can observe it may take several kicks (power cycles) to start it.

Questions (Re Errata Sys#103)

1.       We are aware of device incomplete restart causing non operational device (work around as above). Are there cases of incomplete Reset giving an apparently OK running processor but some subtle anomalies?

2.       Related to above are there any device peripheral register checks we should perform to discover a problem? We use the CAN, SPI, ADC and IO via the HET peripherals.

3.       If we are up and running apparently OK, will normal peripheral device inits (via the HAL s/w interface) always configure the peripherals reliably?

4.       We assume a longer external Reset will not solve the incomplete reset, as this is an internal to the device reset issue?

5.       Will there be an immanent future revision of this TMS470 that will fix this problem?

  • Here is a little more background on this issue. If there is a short pulse on the nRST pin, (by short, I mean roughly the time of the glitch filter, greater than 40nS but less than 150nS) the reset pulse may not be detected by the circuit that extends it, yet may propagate to some of the internal circuits. The issue can be avoided if external circuits attached to the nRST pin give a sufficiently long reset pulse.

    Calex36 said:
    1.       We are aware of device incomplete restart causing non operational device (work around as above). Are there cases of incomplete Reset giving an apparently OK running processor but some subtle anomalies?

    As described in the advisory the device behavior is unpredictable.

    Calex36 said:
    2.       Related to above are there any device peripheral register checks we should perform to discover a problem? We use the CAN, SPI, ADC and IO via the HET peripherals.

    You can check the reset state of the peripherals, or always initialize all registers of the peripherals whenever coming from a CPU reset. However, the problem is that some peripherals may see the reset pulse and the CPU does not.

    Calex36 said:
    3.       If we are up and running apparently OK, will normal peripheral device inits (via the HAL s/w interface) always configure the peripherals reliably?

    Calex36 said:
    4.       We assume a longer external Reset will not solve the incomplete reset, as this is an internal to the device reset issue?

    No, a longer external reset totally avoids the issue.

    Calex36 said:
    5.       Will there be an immanent future revision of this TMS470 that will fix this problem?

    No.