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TM4C123AH6PM: Datasheet clarification on uDMA and NVIC

Part Number: TM4C123AH6PM

Datasheet section 8.2.8 (page 545) states: "When using μDMA to transfer data to and from a peripheral, the peripheral must disable all interrupts to the NVIC."

Two questions:

1) Does that happen automatically or is this something that software must tell the peripheral to do?

2) If an interrupt would occur during the DMA transfer, what happens to it? Is it lost? Is it delayed until completion of the DMA transfer?