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RE: TM4C1231E6PZ: Power on IO pins in hibernation mode and 3V3 supply removed

Expert 5940 points

Hi Everyone,

thank you for your inputs!

What if I use hibernation mode and remove the 3V3 supply (besides Vbat) -> is it ok to have a voltage at the IO Pins? (concerning reverse currents/energy)

Regards

Andreas

  • Outsider Alert!

    Andreas Krasser said:
    is it ok to have a voltage at the IO Pins?

    Much depends upon the:

    • voltage level placed upon those MCU pins
    • presence of suitable 'current limiting' resistors - each/every pin so challenged
    • duration of such condition
    • number of pins so 'afflicted'

    I can report that Venture Capital firms - almost uniformly - 'frown upon such practice!'    While MCU spec sheets (may) indicate (some) ability to 'accept such condition' - NEVER/EVER does the 'Duration AND Number of pins impacted' receive 'Spec Consideration!'    (both number of pins - their 'proximity' (i.e. located upon the same side of the MCU) and the duration of such condition - as well as 'ambient temperature' - all (potentially) may yield 'over-dissipation' issues!)    Never good!

    [edit/adder]  The 'method' by which the '3V3 Supply' is 'removed' - may also (perhaps often) generate voltage spikes - which may pass-thru to the MCU pins.    

  • Yes, other than PJ0 and PJ1, the "Fail-Safe" GPIO pins can have an input voltage less than or equal to 4.5V with an input leakage current up to 700uA as described in section 21.13.2.1 on page 1151 of the datasheet.

  • Greetings Bob,

    Your & my posts bear identical 'time-stamps' - yet differ in their (overall) findings.

  • Hi,

    i have another question concerning the hib mode....

    when the microcontroller is in hib mode and an external reset on pin 63 (#rst) is applied ....

    will then the microcontroller stay in the hib mode or does he ignore the reset?

    and does he then change the state on the #HIB pin?

    thanks a lot!

    chris

  • In hibernation mode the RST- input is ignored.