First I need to be sure you are aware that this part is no longer recommended for new designs. We have very limited support for this part as the current support team has not worked with this part. 

Unfortunately I do not understand your question. Are you trying to disable debug access to the part? 

Firstly i am not creating any new design i had already a design just adding some features in coding .As a part of that i seems that my firmware is not safe so i want to lock the firmware from reading but it should not lock for programming  or debug(Code Read Protection).

Hello,

May it be noted that your two 'objectives' appear somewhat in conflict?

• lock the firmware from reading
• not lock the firmware for programming and/or debug

Do not those 'conflicting objectives lead to these questions?    (which only you are able to answer)

• How will your MCU (know) that the programming/debug attempt is proper - and 'Not' that of an unauthorized source?
• As your design is 'Not' new - has it not (already) been 'in the field' thus, 'well exposed?'    (i.e. 'Shutting the barn door ... (after) the animals have escaped!')   
• It is not 'unusual' for MCU users to, 'Lock themselves Out' during such, 'Security Development!'    As your MCU has (long) been, 'Out of Production' - what then?

Might it prove wiser that you, 'Purchase & Experiment w/one of the vendor's newer MCUs (which ARE available) & only after, 'Meeting your security objectives' move that effort to your (older/irreplaceable) devices?

You should know that, 'Even when defeating 'JTAG/SWD' access' - a properly 'skilled/motivated/equipped' group - can quickly & easily, 'Have your code!'    Reality is not always comforting - yet, 'Now you  know.'

I am just asking how to implement  CRP level 1 .I think you know what is CRP Level 1

Read protection Level 1

(When the read protection level 1 is activated, no access (read, erase, and program) to Flash memory or backup SRAM can be performed via debug features such as Serial Wire or JTAG, even while booting from SRAM or system memory bootloader. However, when booting from Flash memory, accesses to this memory and to backup SRAM from user code are allowed. Any read request to the protected Flash memory generates a bus error. Disabling RDP level 1 protection by re-programming RDP option byte to level 0 leads to a mass erase.)

How would (anyone here) know for what you were, 'Just Asking?'    And - it appears that 'neither' vendor agent nor I were familiar w/'CRP Level 1.' 

In addition - as your MCU is 'no longer' in production - any mistake (likely) renders (both) your MCU & board 'unusable!'     (i.e. Disaster!)

A 'fair reading' of the guidance supplied offers a 'safer path' to your objective - while advising that gaining 'code security' proves more 'illusion' than 'reality.'

You should note that our small firm - learning of the pending, 'EOL' status of the 'LM3S' devices - took the strategic, 'investment decision' to purchase 'several thousand.'     (These placed in controlled & bonded inventory - to include your LM3S6911 - along w/many other of the most popular LM3S MCUs.   

This proved excellent - enabling our small firm to 'rescue many' (by providing (both) 'economical & uniquely available' - replacement 'LM3S' devices!       Along w/code design/development - and, 'Legally recovering  (provided the MCU could be 'proven' theirs) - 'secured' source code' - even from - especially from - 'allegedly' secured (inaccessible JTAG) MCUs.

Hi Arun,

Which document are you getting this information from? I do not find any such reference in the LM3S6911 datasheet. It may be just using different words. There is a mechanism for totally disabling debug on this part as explained on page 268 of the datasheet.