Tool/software: Code Composer Studio
Dear team
I saw the following in RM48 datasheet and User's guide (“parity protection for peripheral RAMs”)
"If any word fails the parity check, the module generates a parity error signal that is mapped to the Error Signaling Module. The module also captures the peripheral RAM address that caused the parity error."
http://www.ti.com/lit/ds/symlink/rm48l530.pdf
http://www.ti.com/lit/ug/spnu503c/spnu503c.pdf
1 So If a parity error is detected in RAM, how does our CPU handle the error data read? Is it discarded and re-read? Or is it still used?
Do we have a recommended approach?
2 CPU's ECC failure ESM Group 3 channel 7: Is there a suggested solution for Flash Uncorrectable error?
BR,
Susan