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TMS570LS3134: Questions for Flash EEPROM Emulation (FEE)

Koichiro Tashiro
Mastermind 21140 points
Part Number: TMS570LS3134

Hi,

I have questions from my customer about FEE(Flash EEPROM Emulation) function.

Q1) Do we have data self-test function for memory contents inside EEPROM?
Customer expects something they can execute the test to detect broken memory bits at production line.

Q2) Suppose a broken bit is detected by the test, is there software function to hide(invalidate) the broken bit (or line) to prevent using the broken bit in application?

Thanks and regards,
Koichiro Tashiro

  • 0
    TI__Guru**** 186176 points

    Hello,

    1. The on-chip FEE memory is supported by SECDED ECC diagnostic. The FEE SECDED ECC controller utilizes the same ECC algorithm as used in the main Flash memory; 8-bit of ECC per 64-bit of data. All detection of ECC faults is performed in the Flash wrapper. Error response is provided via bus error to the CPU and an error signal to ESM. Fault addresses are logged in the Flash wrapper. 

    Anther way is to use CRC to test the integrity of FEE contents  by calculating a CRC for all FEE contents and comparing this value to a previously generated "golden" CRC. The read of FEE contents to the CRC can be done by the CPU or the DMA.

    2. The -bit ECC error can be detected and corrected in RAM, and 2-bit ECC error can be detected only. But the corrected data will not be written to FEE memory.

  • 0 in reply to QJ Wang
    TI__Mastermind 21140 points

    Hi QJ,

    For#2, I understood 1-bit error is corrected in RAM and 2-bit error is detected.
    Customer is asking if we have software (or hardware) mechanism to mask such error bits location.
    For example, marking such bit location and avoid using it after that.

    Thanks and regards,
    Koichiro Tashiro

  • 0 in reply to Koichiro Tashiro
    TI__Guru**** 186176 points

    Hi Koichiro,

    The FEE driver doesn't have this feature of marking the location with ECC error.