RM44L520: Disabling watchdog of TPS65381AQDAPRQ1 using SPI through JTAG debugger

My understanding is that you are able to connect JTAG to the uC, and also able to program image to uC. But the programming is aborted by reset caused by watchdog. 

If this is the case, you need to disable the TPS watchdog, or disconnect TPS NRES and uC nPORRST.

QJ Wang said:

You need to disable the TPS watchdog

Yes, Is there any way to detect the JTAG connection, when it is inserted?. If it is detected, the Watchdog disable can be made)

QJ Wang said:

disconnect TPS NRES and uC nPORRST.

I thought there is a small resistor between TPS NRES and uC nPORRST. 

I don't know how to disable the TPS Watchdog If SPI command is not used (to clear WD_RST_EN Bit of SAFETY_FUNC_CFG Register). Please check with TPS team, they may have good suggestions.

Please use this forum to get suggestion from TPS team:

e2e.ti.com/search

QJ Wang said:

I thought there is a small resistor between TPS NRES and uC nPORRST. 

Yes, there is resistor between TPS NRES and uC nPORRST. I have used this resistor (Removed and pulled-up uC nPORRST during development temporarily) during development stage to avoid this RESET issue. However, this is not feasible, when I go for final release. I have to find a way to avoid this situation.

QJ Wang said:

I don't know how to disable the TPS Watchdog If SPI command is not used

We are using 'SPI command' to serve WD function from uC to TPS65381 with the watchdog in Q&A Mode. So, kindly provide SPI commands to disable WD function during programming.

You can remove the small resistor temporarily during development stage. I will check how to use SPI to disable the watchdog.

QJ Wang said:

I will check how to use SPI to disable the watchdog

As per TPS65381A-Q1 datasheet (Ref: SLVSDJ1A – JULY 2016 – REVISED MAY 2017), Figure 5-16 "Device Controller State Diagram", RESET due to watchdog may be disabled by clearing WD_RST_EN bit = 0. But it is recommended only during software debug. However, I need to disable this when re-programming through JTAG. Kindly confirm whether there is a way to detect in uC, if a debugger/JTAG is connected during run-time (Means while actual code is running).

I read the datasheet, and didn't find other way for MCU to disable the watchdog reset.  

You may get more input from Automotive forum which supports TPS65381.

QJ,

Disabling the watchdog must not be suggested, as this is considered a safety liability (nullifies having a watchdog).

Sunil,

Just for updating MCU program through CCS.

Some options:

1. Increase watchdog timeout interval to accommodate the time required to update MCU program (and service watchdog)
2. In software, before switching TPS to “active” mode, check if application needs to be reprogrammed using a digital input pin for example. Then the user can set the pin high/low before causing system reset, and then check for this pin status before switching TPS to active mode.

Hello,

Have you solved your issue? 

QJ Wang said:

Have you solved your issue? 

It is understood that there is no provision to disable the watchdog function of TPS65381A, when it is active. Also, there is no provision in RM44L520APZT to detect, when JTAG/Debugger is connected (As in <<Tiva C microcontroller>> using System Handler Control and Status (SYSHNDCTRL) register, Ref:

https://e2e.ti.com/support/microcontrollers/other/f/other-microcontrollers-forum/383099/detect-if-a-debugger-jtag-is-connected-at-run-time).

I'm exploring other options to resolve this issue.
1. Inclusion of Normally closed micro switch between NRST (TPS65381A) and PORRST (uc).
2. Detection of JTAG using GPI and disable the Watchdog, When TPS is in diagnostic mode.

For your next rev PCB, you can connect one GIO signal to JTAG header. When JTAG header is plugged, you can disable the external watchdog in GIO ISR. 

Can I close this thread?