https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/<p style="display:none;">blank</p>en-USTelligent Community 13https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1661665/am2434-am243x-secure-boot-sbl-ospi---how-to-modify-memory-map-layout-for-applications-greater-than-256kb/6424909Wed, 22 Jul 2026 07:28:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:cac7fb79-f746-475a-be71-3c1b89cc6e66Prashant Shivhare[quote userid=&quot;706733&quot; url=&quot;~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1661665/am2434-am243x-secure-boot-sbl-ospi---how-to-modify-memory-map-layout-for-applications-greater-than-256kb/6424110&quot;] &quot; The largest platform-specific block is the MMU table area: 196,608 allocated bytes across three 64 KiB-aligned slots. The actual table storage is roughly 64 KiB; approximately 128 KiB is slot/alignment overhead&quot; [/quote] This should not be an issue those variables gets allocated to different sections and so the size of the final application image does not increase ❯ ls -l examples/hello_world/am64x-evm/a53ss0-0_nortos/gcc-aarch64/hello_world.release.out .rwxr-xr-x 1.6M p-shivhare examples/hello_world/am64x-evm/a53ss0-0_nortos/gcc-aarch64/hello_world.release.out* ❯ ls -l examples/hello_world/am64x-evm/a53ss0-0_nortos/gcc-aarch64/hello_world.release.mcelf.hs_fs .rw-r--r-- 77k p-shivhare examples/hello_world/am64x-evm/a53ss0-0_nortos/gcc-aarch64/hello_world.release.mcelf.hs_fs The final application image size is only 77k.https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1662206/am2434-am243x-omron-nx701-set-drive-back-to-init-if-the-drive-is-power-cycled/6424906Wed, 22 Jul 2026 07:26:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:e3be225a-22e7-4e3d-b660-390f82cd4073sahar schwartzHi, In reset_all_no_issue.pcapng , the recording was taken while the drive was already in the OP state, which is likely why no commands were sent. Regarding the other recording, I executed &quot;Reset All&quot; only once, which triggered the INIT state change. If I were to execute it again, I believe we would see the transition to OP . Regarding 0x0141 bit0 — I haven&#39;t tried it with the new SDK yet, but it is still valid for the older version. Let me know how I can help proceed.https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1665093/am13e23019-dsp-processing-m33-vs-c28x-cores-dsp-lib-on-am13ex-that-leverage-fpu-tmu-and-dsp-extension/6424888Wed, 22 Jul 2026 07:13:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:8001688f-c99e-4683-853c-88fafea9cbceShaunak DeshpandeHi Anber, [quote userid=&quot;4466&quot; url=&quot;~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1665093/am13e23019-dsp-processing-m33-vs-c28x-cores-dsp-lib-on-am13ex-that-leverage-fpu-tmu-and-dsp-extension&quot;] For AM13x I found in the AM13x SDK 26.xx: -CMSIS FP FFT example: https://dev.ti.com/tirex/explore/node?isTheia=false&amp;node=A__AKVxnh7buNTrboq4xIyK5Q__AM13E2X-SDK__My-xG.q__LATEST -Can the rest of the ARM CMIS DSP lib (below) be easily ported to AM13x? https://github.com/ARM-software/CMSIS_4/tree/master/CMSIS/DSP_Lib [/quote] The SDK does already contain these. Please checkout the path : mcu_sdk/source/cmsis/DSP/ [quote userid=&quot;4466&quot; url=&quot;~/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1665093/am13e23019-dsp-processing-m33-vs-c28x-cores-dsp-lib-on-am13ex-that-leverage-fpu-tmu-and-dsp-extension&quot;] -Are the on-chip FPU and DSP extension/accelerator automatically leverage by the TI C compiler? -Do we have some benchmarks that compare C28x vs M33 (AM13Ex) DSP performances (like FIR, FFT, ..etc)? [/quote] The only accelerator we have is TMU. The DSP and FPU are picked from the ARM M33 subsystem as is, so the compiled code would already be optimized for FPU and DSP. For TMU, It is in future plan to have this functionality to smartly leverage TMU and offload the calculations automatically. Until then, we will have to use the TMU specific APIs in code wherever the TMU performance is needed. Compiler will not automatically leverage TMU. But we have already communicated this requirement to the compiler team so im hopeful about this being available in some future release. About the C28 vs M33 Benchmark, I am in talks with our internal teams to know if we have these. I&#39;ll get back on this by Monday or Tuesday. Regards, Shaunakhttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1666464/mspm0h3216-mspm0h3216-sysosc-accuracy-over--20-c-to-80-cWed, 22 Jul 2026 06:49:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4798288e-4c29-47bd-a857-e957eb16ff46Ibuki EndoPart Number: MSPM0H3216 Other Parts Discussed in Thread: MSPM0G3507 , Hi expert, We measured the frequency error of the LP-MSPM0H3216 using the FCC function in an in-house temperature chamber. https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1659213/mspm0h3216-sysosc-accuracy-over--20-c-to-80-c/6420074?tisearch=e2e-sitesearch&amp;keymatch=%20user%3A688149 # The results are shown below, and it appears that the &#177;1% requirement is satisfied. -20℃ 25℃ 80℃ No.1 +0.5982% +0.6032% +0.2363% No.2 +0.4777% +0.3624% -0.0744% No.3 +0.7004% +0.6554% +0.3447% In another thread, we were informed that the following information is available for the MSPM0G3507. Is there any similar information available for the MSPM0H3216? https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1574395/mspm0g3507-sysosc-clock-frequency-accuracy?tisearch=e2e-sitesearch&amp;keymatch=sysosc# Since achieving oscillator accuracy comparable to competing products is an important factor in adopting this device, we would greatly appreciate it if you could kindly check this once again. Thank you very much for your support. Best regard, Ibuki EndoLP-MSPM0H3216MSPM0G3507MSPM0H3216https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1662206/am2434-am243x-omron-nx701-set-drive-back-to-init-if-the-drive-is-power-cycled/6424853Wed, 22 Jul 2026 06:44:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:447aa979-c6ee-4f1a-bf95-3914a1ddcd29Aaron ThomasHi Sahar, One clarification based on the logs, during &quot;Reset All&quot; command being executed, doesn&#39;t the MainDevice send out INIT &gt; PREOP &gt; SAFEOP &gt; OP state change requests through 0x0120 ESC Register? In reset_all_no_issue.pcapng, there is no datagram sent from the MainDevice which is addressed to 0x0120 ESC Register. In reset_all_node_22_falls_to_init.pcapng, there is an INIT state change request at frame# 17432, but no following state transition request from INIT &gt; PREOP &gt; SAFEOP &gt; OP. Additionally, in the older thread, you mentioned the issue is not observed when 0x0141.bit0 is set: Is this observation still valid? Regards, Aaronhttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1660371/tms570ls3137-flash-api-source-code-request/6424849Wed, 22 Jul 2026 06:39:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a1b350c5-ef12-4ca2-91b2-de983d185d21İsmail Uğur Şahing&#246;zHi Jagadish, My company has an NDA with TI. Best Regards, İsmail Uğur Şahing&#246;zhttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1655880/mspm33c321a-m33-github-sdk-is-empty-except-for-tags/6424835Wed, 22 Jul 2026 06:32:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:a77d99c3-7a19-4b90-a710-735e0077078cXiaodong LIHi Anber Please download the mspm33_sdk_1_04_00_00 in https://www.ti.com/product/MSPM33C321A-Q1#software-development Thankshttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1649920/ek-tm4c1294xl-tm4c1294xl-usb-host-msc-logger-implementation-review-architecture-improvement-suggestions/6424793Wed, 22 Jul 2026 05:55:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:b4a48fc5-2b0a-416c-b5b3-4ff90734eb56Xiaodong LIRecommends Option 1 (maintaining the regular execution of USBOTGMain() ). Pausing or blocking the core USB main stack function (Option 2) halts the internal state machines of the TivaWare USB Library ™ USB Library - Texas Instruments&quot;,&quot;In a full. OTG system, the polling rate is not required, but it will set how often the USB library issues session request on B side of the USB cable and how often it will look for devices if on the A side of the cable. Regardless of the mode that is detected the application should periodically call the USBOTGMain() function to allow the polling to function as well as call the USB library&#39;s main function once host mode is determined. The USBOTGMain() takes the number of elapsed milliseconds since the last call to USBOTGMain() in order to provide the USB OTG library functions with some basic timing information. When the USB library detects that it is on the B side of the cable and has been powered, then the.&quot;,&quot;https://encrypted-tbn2.gstatic.com/images?q\u003dtbn:ANd9GcSYuJwpE596J_eH5yOGrZYGT-Nim7TT6MEAnqcHRHtGOaDDO_Ud48FZ-RjxUDjaZ-_gi28RSgg9wOZXJMw&quot;,&quot;Texas Instruments&quot;,&quot;https://encrypted-tbn0.gstatic.com/faviconV2?url\u003dhttps://www.ti.com\u0026client\u003dAIM\u0026size\u003d128\u0026type\u003dFAVICON\u0026fallback_opts\u003dTYPE,SIZE,URL&quot;,[[1784699477797091,107759474,1025185070],null,null,null,null,[[2,2,6]]],null,&quot;3839fb0c-a420-49d9-aaa4-f643b48293d9&quot;]]--&gt; , which will cause internal state desynchronization, missed hardware events, or memory/pipe leaks. 1. Post-Disconnect Execution Yes , USBOTGMain() must continue to run after MSC_EVENT_CLOSE . The callback only notifies your application layer. The stack requires active main loops to finish freeing Host Controller Driver (HCD) pipes. Internal state flags must reset cleanly to an idle state. 2. Servicing Rule with Empty Port Yes , the 10-20ms rule still applies when the port is completely empty. The stack uses this time delta to monitor VBUS power stability. It drives ID pin polling for On-The-Go (OTG) role switches. It executes low-level physical layer debouncing. 3. Reconnect Risks during Option 1 Wait No , it will not corrupt internal pipeline allocations. The stack internally manages its pipe allocation and teardown in sequence. If a reconnect happens, the stack won&#39;t reuse a pipe until it is explicitly freed. Ignoring MSC_EVENT_OPEN keeps your application safe while the stack stabilizes 4. Consequence of Stopping USBOTGMain() (Option 2) Yes , the USB host stack will get stuck. Internal timing loops and software state machine timeouts will freeze. Interrupt handlers will mismatch with the unserviced main state. This results in memory corruption or driver crashes upon resuming. 5. Purpose of the 500ms Settling Delay It is meant only for the application state machine and FatFs layer. It prevents rapid, CPU-heavy file system mounting on a bouncing contact. It allows transient power draw drops to settle on the VBUS line. The TivaWare Stack handles its own low-level USB bus reset timing. Thankshttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1658170/mspm0g1519-mspm0g1519-bsl-entry-from-application/6424762Wed, 22 Jul 2026 05:33:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:4b06cc9a-1105-4df9-95e0-dfb74a6a2e9fMarco MarderHi Diego, I made an interesting observation. We were placing the SRAM ORIGIN in the linker file at 0x20200000 (unchecked region) - with this all SRAM accesses are done via this aliased region. When I change the SRAM ORIGIN to the default region 0x20000000 (ECC checked region) then DL_SYSCTL_resetDevice ( DL_SYSCTL_RESET_ BOOTLOADER_ENTRY ); brings the device into bootloader and the device stays in bootloader as long as there is not power cycle or a start application command via the I2C interface - meaning everything works as expected. What is your assessment of this finding? Is this worth checking from your side and if you can reproduce thinking about publishing an Errata? Best Regards Marcohttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1660371/tms570ls3137-flash-api-source-code-request/6424723Wed, 22 Jul 2026 05:00:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:c039ec3f-503c-439f-b809-bf8510a3b4bejagadish gundavarapuHi İsmail Uğur Şahing&#246;z, Does your company have valid NDA with TI? If not then please contact local sales team to get it, before proceeding with further process. -- Thanks &amp; Regards, Jagadish.https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1649920/ek-tm4c1294xl-tm4c1294xl-usb-host-msc-logger-implementation-review-architecture-improvement-suggestions/6424660Wed, 22 Jul 2026 03:40:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:f2bbc309-9c88-4596-b348-9386af282159B BHi Li Gentle reminder in case this week you can replyhttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1665547/am5726-am572x-cortex-a15-r2p2-errats/6424651Wed, 22 Jul 2026 03:18:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:9df2a63e-428d-42ec-a1d2-6cd9b23d56c8Keerthy JHi, Any crash logs or logs prior to this hang? What&#39;s the use case that&#39;s running when this? Is it just linux that&#39;s running? Best regards, Keerthyhttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1661805/mspm0g3507-mspm0g3507-fail-to-erase-flash-sector-when-only-last-64-bits-are-non-0xff/6424607Wed, 22 Jul 2026 02:34:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:47d6e0a1-af84-459b-b2a6-ad768743c758LEON YANHi Janz, Need your help on this, thanks. LEONhttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1666400/mspm0g3507-failure-to-complete-i2c-transactionWed, 22 Jul 2026 01:56:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:5c7ba35f-c762-49c9-bb5a-60eb161c92eaCrane ShaoPart Number: MSPM0G3507 Hi, I am trying to use the LaunchPad to talk to an I2C device through I2C bus. When sending out the slave address with a command byte, the slave acknowledged the slave address, but the clock for data byte&#39;s ACK/NACK is missing. What might be the cause? Below is the signals of SCL and SDA on the scope when submitting the command 0x03 to the slave with address 0x57. The SDK goes low forever and the bus status goes busy and stays busy. Any input would be helpful. Thanks! CraneMSPM0G3507https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1664725/am6442-documentation-which-is-stated-limitation-and-know-issue-for-enet-for-a53-in-mcu-sdk/6424495Wed, 22 Jul 2026 00:30:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:3268517d-8583-4ea7-91b8-1c4c24d24773Ito JunHi Teja, Thank you very much for checking this with your development team. For now, I wanted to confirm whether the ENET driver is SMP-compatible. Once our design enters the next phase, I will be able to share more details about our intended use case. Thank you for your support. Best regards, Itohttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1666376/mspm0g3519-q1-mspm0g3519-lp-mspm0g3519-design-filesTue, 21 Jul 2026 23:34:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:cda1219d-566a-4bf6-adee-0dc9f714c883Derek JacksonPart Number: MSPM0G3519-Q1 I am looking for the reference design files (gerber, etc.) for the M0G3519QPMRQ1 as well, thank you.MSPM0G3519-Q1MSPM0G3519LP-MSPM0G3519https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1665703/am625-u-boot-tispl-bin-ti-sci-authentication-failed/6424415Tue, 21 Jul 2026 22:47:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:d2661099-968b-48c6-b9a5-d4fa71c01ae8Hong Guan64I&#39;d recommend having a review on tispl.bin signing process with the customer key. Best, -Honghttps://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1662634/tmdscncd28p65x-customer-reported-issue-tmdscncd28p65x-request-for-defect-confirmation/6424385Tue, 21 Jul 2026 22:03:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:3e6995a2-fce5-4068-b2e0-a671a501b60dStevan DuraskovicHello, Do you have any update on this query?https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1666354/tida-010979-tida-010979-can-the-motor-end-plate-be-used-as-the-heat-sink-for-top-side-cooling-fetsTue, 21 Jul 2026 20:28:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:97915b32-4dcd-4d3f-adab-7445e6241292Yousef BayanlooPart Number: TIDA-010979 Hello TI team, We are evaluating the mechanical integration of the TIDA-010979 reference design into a humanoid robot actuator. The TIDA-010979 design guide states that the PCB provides mounting holes for an optional heat sink for the top-side-cooled DRV7167A power stages. Would the following installation be technically permissible? 1. Install the TIDA-010979 PCB with the top side containing the three DRV7167A power stages facing the motor end plate or motor housing. 2. Use a local thermal interface material or heat-spreader between the exposed top surfaces of the three DRV7167A devices and the motor end plate. We understand that the thermal tests in the reference-design guide were performed under natural convection without a heat sink. Our question concerns the mechanically supported installation possibilities of the published design, not the documented laboratory test setup. A short yes/no confirmation with the relevant conditions would be very helpful. Best regards, JosefTIDA-010979https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1666348/tida-010979-drv7167-tida-010979-can-the-motor-end-plate-be-used-as-the-top-side-heat-sinkTue, 21 Jul 2026 19:22:00 GMTcb01d8b2-d089-468d-babb-77d1d8683490:27717405-840f-4e99-8ceb-7a45676bc14dYousef BayanlooPart Number: TIDA-010979 Hello TI team, We are evaluating the mechanical integration of the TIDA-010979 reference design into a humanoid robot actuator. The TIDA-010979 design guide states that the PCB provides mounting holes for an optional heat sink for the top-side-cooled DRV7167A power stages. Would the following installation be technically permissible? 1. Install the TIDA-010979 PCB with the top side containing the three DRV7167A power stages facing the motor end plate or motor housing. 2. Use a local thermal interface material between top surfaces of the three DRV7167A devices and the motor end plate. We understand that the thermal tests in the reference-design guide were performed under natural convection without a heat sink. Our question concerns the mechanically supported installation possibilities of the published design, not the documented laboratory test setup. A short yes/no confirmation with the relevant conditions would be very helpful. Best regards,DRV7167RoboticsTIDA-010979