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TMS320F28388S: SRAM in TI-TXT output

Ed Sanders
Genius 4085 points
Part Number: TMS320F28388S


Tool/software:

Greetings

Our projects use the option to create a TI-TXT file after the link has completed.  In a new project, which uses the CLANG compiler, I can see that in addition to the code, I’m also seeing the IPC RAM space.  The definition of the sections follows.  Is there a way to keep these sections, and any other non-flash sections, out of the TI-TXT file?

Thank you,

Ed

 

// Definition of the IPC RAM space.

__attribute__ ((section ("MSGRAM_CM_TO_CPU1")))

IPC_MEM_DEF IPC_CM_To_CPU1_PutBuffer;

__attribute__ ((section ("MSGRAM_CPU1_TO_CM")))

IPC_MEM_DEF IPC_CM_To_CPU1_GetBuffer;

 

// Cmd file MEMORY

CPU1TOCMMSGRAM0  : origin = 0x20080000, length = 0x00000800

CMTOCPU1MSGRAM0  : origin = 0x20082000, length = 0x00000800

// Cmd file SECTIONS

MSGRAM_CM_TO_CPU1  : >  CMTOCPU1MSGRAM0, type=NOINIT

MSGRAM_CPU1_TO_CM  : >  CPU1TOCMMSGRAM0, type=NOINIT

  • 0
    TI__Guru**** 251090 points

    Please submit two things.

    One: For the source file that contains ...

    Ed Sanders said:

    // Definition of the IPC RAM space.

    __attribute__ ((section ("MSGRAM_CM_TO_CPU1")))

    IPC_MEM_DEF IPC_CM_To_CPU1_PutBuffer;

    __attribute__ ((section ("MSGRAM_CPU1_TO_CM")))

    IPC_MEM_DEF IPC_CM_To_CPU1_GetBuffer;

    ... please follow the directions in the article How to Submit a Compiler Test Case.

    Two: Please submit the linker map file.

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Genius 4085 points

    Hi George,

    The video is about a compiler failure.  I don't believe there is one.  We are able to build the code without issue, and also run the code.  The issue is in the TI-TXT output after the link.  So I have boiled the issue down to a simple project which has none of our IP.  It uses CCS 20.2.0.  I hope this helps.

    IPC_RAM_IN_TI_TXT.zip.txt

    Thank you,

    Ed

  • +1 in reply to Ed Sanders
    TI__Guru**** 251090 points

    Thank you for the test case.  I can build it, and I understand your concern.

    For these structures ...

    Ed Sanders said:

    // Definition of the IPC RAM space.

    __attribute__ ((section ("MSGRAM_CM_TO_CPU1")))

    IPC_MEM_DEF IPC_CM_To_CPU1_PutBuffer;

    __attribute__ ((section ("MSGRAM_CPU1_TO_CM")))

    IPC_MEM_DEF IPC_CM_To_CPU1_GetBuffer;

    ... I determined that the compiler allocates them into an initialized section.  I don't understand why, and I cannot find a way to change the behavior.  Thus, I filed the entry EXT_EP-12799.  You are welcome to follow it with that link.

    For a workaround ... Don't use tiarmhex to create the TI-TXT file.  Use tiarmobjcopy instead.  Tell it to not output anything for those sections.  Here is a sample command:

    tiarmobjcopy --output-target ti-txt --remove-section=MSGRAM_CM_TO_CPU1 --remove-section=MSGRAM_CPU1_TO_CM PM_ECT_CM_1_0.out PM_ECT_CM_1_0.txt

    Thanks and regards,

    -George

  • 0 in reply to George Mock
    Genius 4085 points

    Thank you George,

    I tried tiarmobjcopy, and that seems to work well.

    Thanks again,

    Ed