I am using circular buffer handling FIFO Tx Interrupt Transactions. Whenever Tx Circular Buffer is free, I don't want to enter ISR till I want to send new data block.
What is the best way doing this ?
1. When interrupt occured, TXFFINT flag is being set. If I do not clear it when TxCircular buffer free, then interrupt will not trigger anymore right. ? So, whenever I want
to send new char, clearing this interrupt flag will allow to start Tx İnterrupt transaction right?
2. Instead of not clearing TXFFINT, disable TxFIFO interrupt, and re-enable it whenever want to send data works ? (In this case clearing interrupt-enable bit reset Interrupt Flag also??)
3. Both applying case 1. and 2.
Btw, I have no acces hardware to debug this scenarios.
