Hello,
We are using f28m35x device with messageQ IPC module with TI RTOS version 6.33
Our application is configured and working well with the following IpcMgr settings on Master core (M3):
var IpcMgr = xdc.useModule('ti.sdo.ipc.family.f28m35x.IpcMgr');
IpcMgr.writeAddr = 0x2000e000; // S3 shared memory sector (8K size)
IpcMgr.readAddr = 0x2000c000; // S2 shared memory sector (8K size)
IpcMgr.sharedMemoryOwnerMask = 7; //(S0-S2 sectors owed by C28 core)
IpcMgr.messageQSize = 144;
IpcMgr.numMessageQMsgs = 32;
We are adding additional communication channel that will probably need more than 32 messages allocation. In order to increase this parameter and since numMessageQMsgs must be set as power of 2 the new value for this parameter is 64.
For the new settings 64*144 (messageQSize * numMessageQMsgs) there is not enough memory space in IPC write sector (8K), the question is how can we configure the IPC write memory for more than one sector so we will have more than 8K for IPC write ?
In addition we calculate the usage number of bytes in the write sector and we found that IpcMgr.numNotifyMsgs = 32; takes 0x100 and the msgQ messages takes144*32 = 0x1200 ( 0x1300 total)
In the memory map file we saw 0x1510 memory usage in that specific sector. We do not understand why the map state for additional 0x210 bytes, what we are missing here ?
from the memory map -
name origin length used unused attr fill
S03SHRAM 2000e000 00002000 00001510 00000af0 RW X
I will appreciate any kind of help.
Thanks in advance,
Merav
